kernel/linux
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ synced 2026-11-10 20:48:12 +00:00
Code Issues Releases Packages Activity
linux/arch/xtensa/include/asm/bootparam.h

50 lines
1.4 KiB
Raw Normal View History

[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6 The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:26 -07:00
xtensa: bootparams: fix typo Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2013-06-06 14:23:37 +03:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6 The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:26 -07:00
xtensa: add device trees support Device trees allow specification of hardware topology and device parameters at runtime instead of hard-coding them in platform setup code. This allows running single binary kernel on a range of compatible boards. New boot parameters tag BP_TAG_FDT is allocated and a pointer to flat device tree is passed in it. Note that current interrupt mapping scheme uses single cell for interrupt identification. That means that IRQ numbers used in DTS must be CPU internal IRQ numbers, not external. It is possible to extend interrupt identification to two cells, and use second cell to tell external IRQ numbers form internal. That would allow to use single DTS on multiple boards with different mapping of external IRQ numbers. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-04 00:30:13 +04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6 The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:26 -07:00
xtensa: clean up files to make them code-style compliant Remove heading and trailing spaces, trim trailing lines, and wrap lines that are longer than 80 characters. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-28 16:53:51 -08:00
treewide: Replace zero-length arrays with flexible-array members There is a regular need in the kernel to provide a way to declare having a dynamically sized set of trailing elements in a structure. Kernel code should always use “flexible array members”[1] for these cases. The older style of one-element or zero-length arrays should no longer be used[2]. This code was transformed with the help of Coccinelle: (next-20220214$ spatch --jobs $(getconf _NPROCESSORS_ONLN) --sp-file script.cocci --include-headers --dir . > output.patch) @@ identifier S, member, array; type T1, T2; @@ struct S { ... T1 member; T2 array[ - 0 ]; }; UAPI and wireless changes were intentionally excluded from this patch and will be sent out separately. [1] https://en.wikipedia.org/wiki/Flexible_array_member [2] https://www.kernel.org/doc/html/v5.16/process/deprecated.html#zero-length-and-one-element-arrays Link: https://github.com/KSPP/linux/issues/78 Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2022-02-14 19:11:44 -06:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6 The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:26 -07:00
xtensa: split bootparam and kernel meminfo Bootparam meminfo is a bootloader ABI, kernel meminfo is for the kernel bookkeeping, keep them separate. Kernel doesn't care of memory region types, so drop the type field and don't pass it to add_sysmem_bank. Move kernel sysmem structures and prototypes to asm/sysmem.h and sysmem variable and add_sysmem_bank to mm/init.c Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-03-23 03:17:43 +04:00
xtensa: clean up files to make them code-style compliant Remove heading and trailing spaces, trim trailing lines, and wrap lines that are longer than 80 characters. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-28 16:53:51 -08:00
xtensa: split bootparam and kernel meminfo Bootparam meminfo is a bootloader ABI, kernel meminfo is for the kernel bookkeeping, keep them separate. Kernel doesn't care of memory region types, so drop the type field and don't pass it to add_sysmem_bank. Move kernel sysmem structures and prototypes to asm/sysmem.h and sysmem variable and add_sysmem_bank to mm/init.c Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2014-03-23 03:17:43 +04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 6 The attached patches provides part 6 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:26 -07:00