2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2023-11-01 15:02:01 +08:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2014-04-30 11:20:53 -06:00
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2017-05-17 10:27:28 -03:00
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2014-04-30 11:20:53 -06:00
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PCI: Add pci_bus_addr_t
David Ahern reported that d63e2e1f3df9 ("sparc/PCI: Clip bridge windows
to fit in upstream windows") fails to boot on sparc/T5-8:
pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address 0x110204000)
The problem is that sparc64 assumed that dma_addr_t only needed to hold DMA
addresses, i.e., bus addresses returned via the DMA API (dma_map_single(),
etc.), while the PCI core assumed dma_addr_t could hold *any* bus address,
including raw BAR values. On sparc64, all DMA addresses fit in 32 bits, so
dma_addr_t is a 32-bit type. However, BAR values can be 64 bits wide, so
they don't fit in a dma_addr_t. d63e2e1f3df9 added new checking that
tripped over this mismatch.
Add pci_bus_addr_t, which is wide enough to hold any PCI bus address,
including both raw BAR values and DMA addresses. This will be 64 bits
on 64-bit platforms and on platforms with a 64-bit dma_addr_t. Then
dma_addr_t only needs to be wide enough to hold addresses from the DMA API.
[bhelgaas: changelog, bugzilla, Kconfig to ensure pci_bus_addr_t is at
least as wide as dma_addr_t, documentation]
Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Fixes: 23b13bc76f35 ("PCI: Fail safely if we can't handle BARs larger than 4GB")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96231
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: stable@vger.kernel.org # v3.19+
2015-05-27 17:23:51 -07:00
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2014-04-30 11:20:53 -06:00
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PCI: Add pci_bus_addr_t
David Ahern reported that d63e2e1f3df9 ("sparc/PCI: Clip bridge windows
to fit in upstream windows") fails to boot on sparc/T5-8:
pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address 0x110204000)
The problem is that sparc64 assumed that dma_addr_t only needed to hold DMA
addresses, i.e., bus addresses returned via the DMA API (dma_map_single(),
etc.), while the PCI core assumed dma_addr_t could hold *any* bus address,
including raw BAR values. On sparc64, all DMA addresses fit in 32 bits, so
dma_addr_t is a 32-bit type. However, BAR values can be 64 bits wide, so
they don't fit in a dma_addr_t. d63e2e1f3df9 added new checking that
tripped over this mismatch.
Add pci_bus_addr_t, which is wide enough to hold any PCI bus address,
including both raw BAR values and DMA addresses. This will be 64 bits
on 64-bit platforms and on platforms with a 64-bit dma_addr_t. Then
dma_addr_t only needs to be wide enough to hold addresses from the DMA API.
[bhelgaas: changelog, bugzilla, Kconfig to ensure pci_bus_addr_t is at
least as wide as dma_addr_t, documentation]
Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Fixes: 23b13bc76f35 ("PCI: Fail safely if we can't handle BARs larger than 4GB")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96231
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: stable@vger.kernel.org # v3.19+
2015-05-27 17:23:51 -07:00
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2017-05-17 10:27:28 -03:00
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2014-04-30 11:20:53 -06:00
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PCI: Add pci_bus_addr_t
David Ahern reported that d63e2e1f3df9 ("sparc/PCI: Clip bridge windows
to fit in upstream windows") fails to boot on sparc/T5-8:
pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address 0x110204000)
The problem is that sparc64 assumed that dma_addr_t only needed to hold DMA
addresses, i.e., bus addresses returned via the DMA API (dma_map_single(),
etc.), while the PCI core assumed dma_addr_t could hold *any* bus address,
including raw BAR values. On sparc64, all DMA addresses fit in 32 bits, so
dma_addr_t is a 32-bit type. However, BAR values can be 64 bits wide, so
they don't fit in a dma_addr_t. d63e2e1f3df9 added new checking that
tripped over this mismatch.
Add pci_bus_addr_t, which is wide enough to hold any PCI bus address,
including both raw BAR values and DMA addresses. This will be 64 bits
on 64-bit platforms and on platforms with a 64-bit dma_addr_t. Then
dma_addr_t only needs to be wide enough to hold addresses from the DMA API.
[bhelgaas: changelog, bugzilla, Kconfig to ensure pci_bus_addr_t is at
least as wide as dma_addr_t, documentation]
Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Fixes: 23b13bc76f35 ("PCI: Fail safely if we can't handle BARs larger than 4GB")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96231
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: stable@vger.kernel.org # v3.19+
2015-05-27 17:23:51 -07:00
|
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|
2014-04-30 11:20:53 -06:00
|
|
|
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|
|
|
|
|
|
PCI: Add pci_bus_addr_t
David Ahern reported that d63e2e1f3df9 ("sparc/PCI: Clip bridge windows
to fit in upstream windows") fails to boot on sparc/T5-8:
pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address 0x110204000)
The problem is that sparc64 assumed that dma_addr_t only needed to hold DMA
addresses, i.e., bus addresses returned via the DMA API (dma_map_single(),
etc.), while the PCI core assumed dma_addr_t could hold *any* bus address,
including raw BAR values. On sparc64, all DMA addresses fit in 32 bits, so
dma_addr_t is a 32-bit type. However, BAR values can be 64 bits wide, so
they don't fit in a dma_addr_t. d63e2e1f3df9 added new checking that
tripped over this mismatch.
Add pci_bus_addr_t, which is wide enough to hold any PCI bus address,
including both raw BAR values and DMA addresses. This will be 64 bits
on 64-bit platforms and on platforms with a 64-bit dma_addr_t. Then
dma_addr_t only needs to be wide enough to hold addresses from the DMA API.
[bhelgaas: changelog, bugzilla, Kconfig to ensure pci_bus_addr_t is at
least as wide as dma_addr_t, documentation]
Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Fixes: 23b13bc76f35 ("PCI: Fail safely if we can't handle BARs larger than 4GB")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96231
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: stable@vger.kernel.org # v3.19+
2015-05-27 17:23:51 -07:00
|
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
|
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2014-04-30 11:20:53 -06:00
|
|
|
|
PCI: Add pci_bus_addr_t
David Ahern reported that d63e2e1f3df9 ("sparc/PCI: Clip bridge windows
to fit in upstream windows") fails to boot on sparc/T5-8:
pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address 0x110204000)
The problem is that sparc64 assumed that dma_addr_t only needed to hold DMA
addresses, i.e., bus addresses returned via the DMA API (dma_map_single(),
etc.), while the PCI core assumed dma_addr_t could hold *any* bus address,
including raw BAR values. On sparc64, all DMA addresses fit in 32 bits, so
dma_addr_t is a 32-bit type. However, BAR values can be 64 bits wide, so
they don't fit in a dma_addr_t. d63e2e1f3df9 added new checking that
tripped over this mismatch.
Add pci_bus_addr_t, which is wide enough to hold any PCI bus address,
including both raw BAR values and DMA addresses. This will be 64 bits
on 64-bit platforms and on platforms with a 64-bit dma_addr_t. Then
dma_addr_t only needs to be wide enough to hold addresses from the DMA API.
[bhelgaas: changelog, bugzilla, Kconfig to ensure pci_bus_addr_t is at
least as wide as dma_addr_t, documentation]
Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Fixes: 23b13bc76f35 ("PCI: Fail safely if we can't handle BARs larger than 4GB")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96231
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: stable@vger.kernel.org # v3.19+
2015-05-27 17:23:51 -07:00
|
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2006-04-01 10:21:52 -08:00
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2005-04-16 15:20:36 -07:00
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2025-12-29 04:01:21 -05:00
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2019-02-15 09:01:53 +01:00
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2019-04-10 06:56:20 -03:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2025-06-27 12:10:09 +02:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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2013-06-26 13:49:44 +01:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2017-05-17 10:27:28 -03:00
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2013-06-26 13:49:44 +01:00
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2025-06-27 12:10:09 +02:00
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2017-05-17 10:27:28 -03:00
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2013-06-26 13:49:44 +01:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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2023-04-07 06:54:51 -04:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2005-04-16 15:20:36 -07:00
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docs: dma: correct dma_set_mask() sample code
There are bunch of codes in driver like
if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)))
dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))
Actually it is wrong because if dma_set_mask_and_coherent(64) fails,
dma_set_mask_and_coherent(32) will fail for the same reason.
And dma_set_mask_and_coherent(64) never returns failure.
According to the definition of dma_set_mask(), it indicates the width of
address that device DMA can access. If it can access 64-bit address, it
must access 32-bit address inherently. So only need set biggest address
width.
See below code fragment:
dma_set_mask(mask)
{
mask = (dma_addr_t)mask;
if (!dev->dma_mask || !dma_supported(dev, mask))
return -EIO;
arch_dma_set_mask(dev, mask);
*dev->dma_mask = mask;
return 0;
}
dma_supported() will call dma_direct_supported or iommux's dma_supported
call back function.
int dma_direct_supported(struct device *dev, u64 mask)
{
u64 min_mask = (max_pfn - 1) << PAGE_SHIFT;
/*
* Because 32-bit DMA masks are so common we expect every architecture
* to be able to satisfy them - either by not supporting more physical
* memory, or by providing a ZONE_DMA32. If neither is the case, the
* architecture needs to use an IOMMU instead of the direct mapping.
*/
if (mask >= DMA_BIT_MASK(32))
return 1;
...
}
The iommux's dma_supported() actually means iommu requires devices's
minimized dma capability.
An example:
static int sba_dma_supported( struct device *dev, u64 mask)()
{
...
* check if mask is >= than the current max IO Virt Address
* The max IO Virt address will *always* < 30 bits.
*/
return((int)(mask >= (ioc->ibase - 1 +
(ioc->pdir_size / sizeof(u64) * IOVP_SIZE) )));
...
}
1 means supported. 0 means unsupported.
Correct document to make it more clear and provide correct sample code.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
[jc: fixed then/than typo]
Link: https://lore.kernel.org/r/20240401174159.642998-1-Frank.Li@nxp.com
2024-04-01 13:41:59 -04:00
|
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|
2005-04-16 15:20:36 -07:00
|
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|
docs: dma: correct dma_set_mask() sample code
There are bunch of codes in driver like
if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)))
dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))
Actually it is wrong because if dma_set_mask_and_coherent(64) fails,
dma_set_mask_and_coherent(32) will fail for the same reason.
And dma_set_mask_and_coherent(64) never returns failure.
According to the definition of dma_set_mask(), it indicates the width of
address that device DMA can access. If it can access 64-bit address, it
must access 32-bit address inherently. So only need set biggest address
width.
See below code fragment:
dma_set_mask(mask)
{
mask = (dma_addr_t)mask;
if (!dev->dma_mask || !dma_supported(dev, mask))
return -EIO;
arch_dma_set_mask(dev, mask);
*dev->dma_mask = mask;
return 0;
}
dma_supported() will call dma_direct_supported or iommux's dma_supported
call back function.
int dma_direct_supported(struct device *dev, u64 mask)
{
u64 min_mask = (max_pfn - 1) << PAGE_SHIFT;
/*
* Because 32-bit DMA masks are so common we expect every architecture
* to be able to satisfy them - either by not supporting more physical
* memory, or by providing a ZONE_DMA32. If neither is the case, the
* architecture needs to use an IOMMU instead of the direct mapping.
*/
if (mask >= DMA_BIT_MASK(32))
return 1;
...
}
The iommux's dma_supported() actually means iommu requires devices's
minimized dma capability.
An example:
static int sba_dma_supported( struct device *dev, u64 mask)()
{
...
* check if mask is >= than the current max IO Virt Address
* The max IO Virt address will *always* < 30 bits.
*/
return((int)(mask >= (ioc->ibase - 1 +
(ioc->pdir_size / sizeof(u64) * IOVP_SIZE) )));
...
}
1 means supported. 0 means unsupported.
Correct document to make it more clear and provide correct sample code.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
[jc: fixed then/than typo]
Link: https://lore.kernel.org/r/20240401174159.642998-1-Frank.Li@nxp.com
2024-04-01 13:41:59 -04:00
|
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2014-04-30 11:20:53 -06:00
|
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2005-04-16 15:20:36 -07:00
|
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|
|
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|
docs: dma: correct dma_set_mask() sample code
There are bunch of codes in driver like
if (dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)))
dma_set_mask_and_coherent(dev, DMA_BIT_MASK(32))
Actually it is wrong because if dma_set_mask_and_coherent(64) fails,
dma_set_mask_and_coherent(32) will fail for the same reason.
And dma_set_mask_and_coherent(64) never returns failure.
According to the definition of dma_set_mask(), it indicates the width of
address that device DMA can access. If it can access 64-bit address, it
must access 32-bit address inherently. So only need set biggest address
width.
See below code fragment:
dma_set_mask(mask)
{
mask = (dma_addr_t)mask;
if (!dev->dma_mask || !dma_supported(dev, mask))
return -EIO;
arch_dma_set_mask(dev, mask);
*dev->dma_mask = mask;
return 0;
}
dma_supported() will call dma_direct_supported or iommux's dma_supported
call back function.
int dma_direct_supported(struct device *dev, u64 mask)
{
u64 min_mask = (max_pfn - 1) << PAGE_SHIFT;
/*
* Because 32-bit DMA masks are so common we expect every architecture
* to be able to satisfy them - either by not supporting more physical
* memory, or by providing a ZONE_DMA32. If neither is the case, the
* architecture needs to use an IOMMU instead of the direct mapping.
*/
if (mask >= DMA_BIT_MASK(32))
return 1;
...
}
The iommux's dma_supported() actually means iommu requires devices's
minimized dma capability.
An example:
static int sba_dma_supported( struct device *dev, u64 mask)()
{
...
* check if mask is >= than the current max IO Virt Address
* The max IO Virt address will *always* < 30 bits.
*/
return((int)(mask >= (ioc->ibase - 1 +
(ioc->pdir_size / sizeof(u64) * IOVP_SIZE) )));
...
}
1 means supported. 0 means unsupported.
Correct document to make it more clear and provide correct sample code.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
[jc: fixed then/than typo]
Link: https://lore.kernel.org/r/20240401174159.642998-1-Frank.Li@nxp.com
2024-04-01 13:41:59 -04:00
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2019-02-15 09:01:53 +01:00
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2019-05-27 15:59:13 -03:00
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2005-04-16 15:20:36 -07:00
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2019-02-15 09:01:53 +01:00
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2014-05-20 16:54:22 -06:00
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2025-06-27 12:10:09 +02:00
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2014-05-20 16:54:22 -06:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2013-06-26 13:49:44 +01:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2009-04-06 19:01:19 -07:00
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2009-12-06 18:30:44 -08:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2025-06-27 12:10:09 +02:00
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2005-04-16 15:20:36 -07:00
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2025-06-27 12:10:09 +02:00
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2005-04-16 15:20:36 -07:00
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2025-06-27 12:10:09 +02:00
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PCI: Add pci_bus_addr_t
David Ahern reported that d63e2e1f3df9 ("sparc/PCI: Clip bridge windows
to fit in upstream windows") fails to boot on sparc/T5-8:
pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address 0x110204000)
The problem is that sparc64 assumed that dma_addr_t only needed to hold DMA
addresses, i.e., bus addresses returned via the DMA API (dma_map_single(),
etc.), while the PCI core assumed dma_addr_t could hold *any* bus address,
including raw BAR values. On sparc64, all DMA addresses fit in 32 bits, so
dma_addr_t is a 32-bit type. However, BAR values can be 64 bits wide, so
they don't fit in a dma_addr_t. d63e2e1f3df9 added new checking that
tripped over this mismatch.
Add pci_bus_addr_t, which is wide enough to hold any PCI bus address,
including both raw BAR values and DMA addresses. This will be 64 bits
on 64-bit platforms and on platforms with a 64-bit dma_addr_t. Then
dma_addr_t only needs to be wide enough to hold addresses from the DMA API.
[bhelgaas: changelog, bugzilla, Kconfig to ensure pci_bus_addr_t is at
least as wide as dma_addr_t, documentation]
Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Fixes: 23b13bc76f35 ("PCI: Fail safely if we can't handle BARs larger than 4GB")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96231
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: stable@vger.kernel.org # v3.19+
2015-05-27 17:23:51 -07:00
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2025-06-27 12:10:09 +02:00
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2005-04-16 15:20:36 -07:00
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2025-06-27 12:10:09 +02:00
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2005-04-16 15:20:36 -07:00
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2025-06-27 12:10:09 +02:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2025-06-27 12:10:09 +02:00
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2017-05-17 10:27:28 -03:00
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2025-06-27 12:10:09 +02:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2006-04-01 10:21:52 -08:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2015-05-21 13:57:07 +02:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2006-04-01 10:21:52 -08:00
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2005-04-16 15:20:36 -07:00
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2025-06-27 12:10:09 +02:00
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2005-04-16 15:20:36 -07:00
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2025-06-27 12:10:09 +02:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2025-06-27 12:10:09 +02:00
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2019-03-13 18:45:21 +01:00
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2025-06-27 12:10:09 +02:00
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2019-03-13 18:45:21 +01:00
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2005-04-16 15:20:36 -07:00
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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PCI: Add pci_bus_addr_t
David Ahern reported that d63e2e1f3df9 ("sparc/PCI: Clip bridge windows
to fit in upstream windows") fails to boot on sparc/T5-8:
pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address 0x110204000)
The problem is that sparc64 assumed that dma_addr_t only needed to hold DMA
addresses, i.e., bus addresses returned via the DMA API (dma_map_single(),
etc.), while the PCI core assumed dma_addr_t could hold *any* bus address,
including raw BAR values. On sparc64, all DMA addresses fit in 32 bits, so
dma_addr_t is a 32-bit type. However, BAR values can be 64 bits wide, so
they don't fit in a dma_addr_t. d63e2e1f3df9 added new checking that
tripped over this mismatch.
Add pci_bus_addr_t, which is wide enough to hold any PCI bus address,
including both raw BAR values and DMA addresses. This will be 64 bits
on 64-bit platforms and on platforms with a 64-bit dma_addr_t. Then
dma_addr_t only needs to be wide enough to hold addresses from the DMA API.
[bhelgaas: changelog, bugzilla, Kconfig to ensure pci_bus_addr_t is at
least as wide as dma_addr_t, documentation]
Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Fixes: 23b13bc76f35 ("PCI: Fail safely if we can't handle BARs larger than 4GB")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96231
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: stable@vger.kernel.org # v3.19+
2015-05-27 17:23:51 -07:00
|
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
|
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2014-04-30 11:20:53 -06:00
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2010-03-10 15:23:42 -08:00
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2014-04-30 11:20:53 -06:00
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2005-04-16 15:20:36 -07:00
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2014-04-30 11:20:53 -06:00
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PCI: Add pci_bus_addr_t
David Ahern reported that d63e2e1f3df9 ("sparc/PCI: Clip bridge windows
to fit in upstream windows") fails to boot on sparc/T5-8:
pci 0000:06:00.0: reg 0x184: can't handle BAR above 4GB (bus address 0x110204000)
The problem is that sparc64 assumed that dma_addr_t only needed to hold DMA
addresses, i.e., bus addresses returned via the DMA API (dma_map_single(),
etc.), while the PCI core assumed dma_addr_t could hold *any* bus address,
including raw BAR values. On sparc64, all DMA addresses fit in 32 bits, so
dma_addr_t is a 32-bit type. However, BAR values can be 64 bits wide, so
they don't fit in a dma_addr_t. d63e2e1f3df9 added new checking that
tripped over this mismatch.
Add pci_bus_addr_t, which is wide enough to hold any PCI bus address,
including both raw BAR values and DMA addresses. This will be 64 bits
on 64-bit platforms and on platforms with a 64-bit dma_addr_t. Then
dma_addr_t only needs to be wide enough to hold addresses from the DMA API.
[bhelgaas: changelog, bugzilla, Kconfig to ensure pci_bus_addr_t is at
least as wide as dma_addr_t, documentation]
Fixes: d63e2e1f3df9 ("sparc/PCI: Clip bridge windows to fit in upstream windows")
Fixes: 23b13bc76f35 ("PCI: Fail safely if we can't handle BARs larger than 4GB")
Link: http://lkml.kernel.org/r/CAE9FiQU1gJY1LYrxs+ma5LCTEEe4xmtjRG0aXJ9K_Tsu+m9Wuw@mail.gmail.com
Link: http://lkml.kernel.org/r/1427857069-6789-1-git-send-email-yinghai@kernel.org
Link: https://bugzilla.kernel.org/show_bug.cgi?id=96231
Reported-by: David Ahern <david.ahern@oracle.com>
Tested-by: David Ahern <david.ahern@oracle.com>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: David S. Miller <davem@davemloft.net>
CC: stable@vger.kernel.org # v3.19+
2015-05-27 17:23:51 -07:00
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2015-09-23 14:41:09 +03:00
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2011-07-26 16:08:51 -07:00
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2010-05-26 14:44:22 -07:00
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2017-05-17 10:27:28 -03:00
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2012-10-18 14:00:58 -06:00
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2010-05-26 14:44:22 -07:00
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2014-04-30 11:20:53 -06:00
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2010-05-26 14:44:22 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2014-04-30 11:20:53 -06:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2014-04-30 11:20:53 -06:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2010-03-10 15:23:42 -08:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2016-09-11 15:58:53 +02:00
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2005-04-16 15:20:36 -07:00
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2010-08-14 16:36:17 +09:00
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2010-05-26 14:44:23 -07:00
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2010-08-14 16:36:17 +09:00
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2010-05-26 14:44:23 -07:00
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2010-08-14 16:36:17 +09:00
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2010-05-26 14:44:23 -07:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2010-04-23 00:08:02 +02:00
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2005-04-16 15:20:36 -07:00
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2017-05-17 10:27:28 -03:00
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2005-04-16 15:20:36 -07:00
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2007-10-15 11:42:52 +02:00
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2005-04-16 15:20:36 -07:00
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