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linux/arch/xtensa/lib/checksum.S

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treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-27 08:55:01 +02:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
xtensa: replace variant/core.h with asm/core.h Introduce the header arch/xtensa/include/asm/core.h that provides definitions for XCHAL macros missing in older xtensa releases. Use this header instead of variant/core.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-01-01 19:41:55 -08:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up files to make them code-style compliant Remove heading and trailing spaces, trim trailing lines, and wrap lines that are longer than 80 characters. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-28 16:53:51 -08:00
xtensa: abstract 'entry' and 'retw' in assembly code Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros that allocate aligned stack frame in windowed and call0 ABIs. Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack frame size when register spilling is involved. Replace all uses of 'entry' and 'retw' with the above macros. This makes most of the xtensa assembly code ready for XEA3 and call0 ABI. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-05-12 20:28:25 -07:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: abstract 'entry' and 'retw' in assembly code Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros that allocate aligned stack frame in windowed and call0 ABIs. Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack frame size when register spilling is involved. Replace all uses of 'entry' and 'retw' with the above macros. This makes most of the xtensa assembly code ready for XEA3 and call0 ABI. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-05-12 20:28:25 -07:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: provide proper assembler function boundaries with ENDPROC() Use ENDPROC() to mark the end of assembler functions. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-16 16:16:20 -08:00
xtensa: add asm-prototypes.h Move assembly source prototypes from xtensa_ksyms.c to asm/asm-prototypes.h, move corresponding EXPORT_SYMBOLs to the assembly sources and enable HAVE_ASM_MODVERSIONS for xtensa. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2023-05-11 13:53:08 -07:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: provide proper assembler function boundaries with ENDPROC() Use ENDPROC() to mark the end of assembler functions. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-16 16:16:20 -08:00
xtensa: abstract 'entry' and 'retw' in assembly code Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros that allocate aligned stack frame in windowed and call0 ABIs. Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack frame size when register spilling is involved. Replace all uses of 'entry' and 'retw' with the above macros. This makes most of the xtensa assembly code ready for XEA3 and call0 ABI. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-05-12 20:28:25 -07:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: abstract 'entry' and 'retw' in assembly code Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros that allocate aligned stack frame in windowed and call0 ABIs. Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack frame size when register spilling is involved. Replace all uses of 'entry' and 'retw' with the above macros. This makes most of the xtensa assembly code ready for XEA3 and call0 ABI. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-05-12 20:28:25 -07:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
xtensa: propagate the calling conventions change down into csum_partial_copy_generic() turn the exception handlers into returning 0. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2020-07-19 18:03:51 -04:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: provide proper assembler function boundaries with ENDPROC() Use ENDPROC() to mark the end of assembler functions. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-16 16:16:20 -08:00
xtensa: add asm-prototypes.h Move assembly source prototypes from xtensa_ksyms.c to asm/asm-prototypes.h, move corresponding EXPORT_SYMBOLs to the assembly sources and enable HAVE_ASM_MODVERSIONS for xtensa. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2023-05-11 13:53:08 -07:00
xtensa: provide proper assembler function boundaries with ENDPROC() Use ENDPROC() to mark the end of assembler functions. Signed-off-by: Chris Zankel <chris@zankel.net>
2012-11-16 16:16:20 -08:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: clean up fixups in assembly code Remove duplicate definitions of EX() and similar TRY/CATCH and SRC/DST macros from assembly sources and put single definition into asm/asmmacro.h Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-12-09 21:18:47 -08:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00
xtensa: abstract 'entry' and 'retw' in assembly code Provide abi_entry, abi_entry_default, abi_ret and abi_ret_default macros that allocate aligned stack frame in windowed and call0 ABIs. Provide XTENSA_SPILL_STACK_RESERVE macro that specifies required stack frame size when register spilling is involved. Replace all uses of 'entry' and 'retw' with the above macros. This makes most of the xtensa assembly code ready for XEA3 and call0 ABI. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2019-05-12 20:28:25 -07:00
[PATCH] xtensa: Architecture support for Tensilica Xtensa Part 4 The attached patches provides part 4 of an architecture implementation for the Tensilica Xtensa CPU series. Signed-off-by: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-23 22:01:20 -07:00