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linux/drivers/clk/ti/divider.c

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treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULE Based on the normalized pattern: this program is free software you can redistribute it and/or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed as is without any warranty of any kind whether express or implied without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference. Reviewed-by: Allison Randal <allison@lohutok.net> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-06-07 16:11:32 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: add support for legacy divider init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-16 18:20:50 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:45:45 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:45:45 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:45:45 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: convert to use proper register definition for all accesses Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 11:24:37 +02:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: Convert to clk_hw based provider APIs We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-30 17:20:57 -07:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti/divider: fix rate calculation for fractional rates ti/clk-divider.c does not calculate the rates consistently at the moment. As an example, on OMAP3 we have a clock divider with a source clock of 864000000 Hz. With dividers 6, 7 and 8 the theoretical rates are: 6: 144000000 7: 123428571.428571... 8: 108000000 Calling clk_round_rate() with the rate in the first column will give the rate in the second column: 144000000 -> 144000000 143999999 -> 123428571 123428572 -> 123428571 123428571 -> 108000000 Note how clk_round_rate() returns 123428571 for rates from 123428572 to 143999999, which is mathematically correct, but when clk_round_rate() is called with 123428571, the returned value is surprisingly 108000000. This means that the following code works a bit oddly: rate = clk_round_rate(clk, 123428572); clk_set_rate(clk, rate); As clk_set_rate() also does clock rate rounding, the result is that the clock is set to the rate of 108000000, not 123428571 returned by the clk_round_rate. This patch changes the ti/clk-divider.c to use DIV_ROUND_UP when calculating the rate. This gives the following behavior which fixes the inconsistency: 144000000 -> 144000000 143999999 -> 123428572 123428572 -> 123428572 123428571 -> 108000000 Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-02-13 12:04:00 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:45:45 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: Add the table parsing to get the best divider value Currently the divider selection logic blindly divides the parent_rate by the clk rate and gives the divider value for the divider clocks which do not have the CLK_SET_RATE_PARENT flag set. Add the clk divider table parsing to get the closest divider available in the table provided via Device tree. The code is pretty much taken from: drivers/clk/clk-divider.c. and used here to fix up the best divider selection logic. Signed-off-by: Keerthy <j-keerthy@ti.com> Reported-by: Richard Woodruff <r-woodruff2@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-02 14:35:43 +05:30
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:45:45 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: Convert __clk_get_flags() to clk_hw_get_flags() Mostly converted with the following snippet: @@ struct clk_hw *E; @@ -__clk_get_flags(E->clk) +clk_hw_get_flags(E) Acked-by: Tero Kristo <t-kristo@ti.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Daniel Thompson <daniel.thompson@linaro.org> Cc: Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-06-29 16:56:30 -07:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: Add the table parsing to get the best divider value Currently the divider selection logic blindly divides the parent_rate by the clk rate and gives the divider value for the divider clocks which do not have the CLK_SET_RATE_PARENT flag set. Add the clk divider table parsing to get the closest divider available in the table provided via Device tree. The code is pretty much taken from: drivers/clk/clk-divider.c. and used here to fix up the best divider selection logic. Signed-off-by: Keerthy <j-keerthy@ti.com> Reported-by: Richard Woodruff <r-woodruff2@ti.com> Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-12-02 14:35:43 +05:30
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: Convert to clk_hw based provider APIs We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-30 17:20:57 -07:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti/divider: fix rate calculation for fractional rates ti/clk-divider.c does not calculate the rates consistently at the moment. As an example, on OMAP3 we have a clock divider with a source clock of 864000000 Hz. With dividers 6, 7 and 8 the theoretical rates are: 6: 144000000 7: 123428571.428571... 8: 108000000 Calling clk_round_rate() with the rate in the first column will give the rate in the second column: 144000000 -> 144000000 143999999 -> 123428571 123428572 -> 123428571 123428571 -> 108000000 Note how clk_round_rate() returns 123428571 for rates from 123428572 to 143999999, which is mathematically correct, but when clk_round_rate() is called with 123428571, the returned value is surprisingly 108000000. This means that the following code works a bit oddly: rate = clk_round_rate(clk, 123428572); clk_set_rate(clk, rate); As clk_set_rate() also does clock rate rounding, the result is that the clock is set to the rate of 108000000, not 123428571 returned by the clk_round_rate. This patch changes the ti/clk-divider.c to use DIV_ROUND_UP when calculating the rate. This gives the following behavior which fixes the inconsistency: 144000000 -> 144000000 143999999 -> 123428572 123428572 -> 123428572 123428571 -> 108000000 Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-02-13 12:04:00 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: Convert to clk_hw based provider APIs We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-30 17:20:57 -07:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Tested-by: Anddreas Kemnade <andreas@kemnade.info> # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2025-08-11 08:48:10 -04:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Tested-by: Anddreas Kemnade <andreas@kemnade.info> # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2025-08-11 08:48:10 -04:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Tested-by: Anddreas Kemnade <andreas@kemnade.info> # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2025-08-11 08:48:10 -04:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:45:45 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: Provide error check for incoming parameters in set_rate Check for valid parameters in check rate. Else, we end up getting errors like: [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc1 #1 [ 0.000000] [<c0015160>] (unwind_backtrace) from [<c0011978>] (show_stack+0x10/0x14) [ 0.000000] [<c0011978>] (show_stack) from [<c055f5f4>] (dump_stack+0x78/0x94) [ 0.000000] [<c055f5f4>] (dump_stack) from [<c02e17cc>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02e17cc>] (Ldiv0) from [<c047d228>] (ti_clk_divider_set_rate+0x14/0x14c) [ 0.000000] [<c047d228>] (ti_clk_divider_set_rate) from [<c047a938>] (clk_change_rate+0x138/0x180) [ 0.000000] [<c047a938>] (clk_change_rate) from [<c047a908>] (clk_change_rate+0x108/0x180) This occurs as part of the inital clock tree update of child clock nodes where new_rate could be 0 for non functional clocks. Fixes: b4761198bfaf296 ("CLK: ti: add support for ti divider-clock") Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-08-18 11:56:54 -05:00
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:45:45 +02:00
clk: ti: divider: Provide error check for incoming parameters in set_rate Check for valid parameters in check rate. Else, we end up getting errors like: [ 0.000000] Division by zero in kernel. [ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.17.0-rc1 #1 [ 0.000000] [<c0015160>] (unwind_backtrace) from [<c0011978>] (show_stack+0x10/0x14) [ 0.000000] [<c0011978>] (show_stack) from [<c055f5f4>] (dump_stack+0x78/0x94) [ 0.000000] [<c055f5f4>] (dump_stack) from [<c02e17cc>] (Ldiv0+0x8/0x10) [ 0.000000] [<c02e17cc>] (Ldiv0) from [<c047d228>] (ti_clk_divider_set_rate+0x14/0x14c) [ 0.000000] [<c047d228>] (ti_clk_divider_set_rate) from [<c047a938>] (clk_change_rate+0x138/0x180) [ 0.000000] [<c047a938>] (clk_change_rate) from [<c047a908>] (clk_change_rate+0x108/0x180) This occurs as part of the inital clock tree update of child clock nodes where new_rate could be 0 for non functional clocks. Fixes: b4761198bfaf296 ("CLK: ti: add support for ti divider-clock") Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2014-08-18 11:56:54 -05:00
clk: ti/divider: fix rate calculation for fractional rates ti/clk-divider.c does not calculate the rates consistently at the moment. As an example, on OMAP3 we have a clock divider with a source clock of 864000000 Hz. With dividers 6, 7 and 8 the theoretical rates are: 6: 144000000 7: 123428571.428571... 8: 108000000 Calling clk_round_rate() with the rate in the first column will give the rate in the second column: 144000000 -> 144000000 143999999 -> 123428571 123428572 -> 123428571 123428571 -> 108000000 Note how clk_round_rate() returns 123428571 for rates from 123428572 to 143999999, which is mathematically correct, but when clk_round_rate() is called with 123428571, the returned value is surprisingly 108000000. This means that the following code works a bit oddly: rate = clk_round_rate(clk, 123428572); clk_set_rate(clk, rate); As clk_set_rate() also does clock rate rounding, the result is that the clock is set to the rate of 108000000, not 123428571 returned by the clk_round_rate. This patch changes the ti/clk-divider.c to use DIV_ROUND_UP when calculating the rate. This gives the following behavior which fixes the inconsistency: 144000000 -> 144000000 143999999 -> 123428572 123428572 -> 123428572 123428571 -> 108000000 Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-02-13 12:04:00 +02:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: convert to use proper register definition for all accesses Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 11:24:37 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: add support for clock latching to divider clocks Latching the clock settings is needed with certain clocks, where the setting is "cached" in HW before doing the actual re-programming of the clock source. This patch adds support for clock latching to the divider clock. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-02-15 09:49:27 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: Add functions to save/restore clk context SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-04 12:19:37 +05:30
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
clk: ti: Add functions to save/restore clk context SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-04 12:19:37 +05:30
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
clk: ti: Add functions to save/restore clk context SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-04 12:19:37 +05:30
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert from round_rate() to determine_rate() The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Tested-by: Anddreas Kemnade <andreas@kemnade.info> # OMAP3 GTA04, OMAP4 Panda Reviewed-by: Kevin Hilman <khilman@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2025-08-11 08:48:10 -04:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: Add functions to save/restore clk context SoCs like AM43XX lose clock registers context during RTC-only suspend. Hence add functions to save/restore the clock registers context. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Russ Dill <Russ.Dill@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-09-04 12:19:37 +05:30
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
clk: ti: Update component clocks to use ti_dt_clk_name() Let's update all the TI component clocks to use ti_dt_clk_name() instead of devicetree node name if available. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-9-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-02-04 09:14:49 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: Update component clocks to use ti_dt_clk_name() Let's update all the TI component clocks to use ti_dt_clk_name() instead of devicetree node name if available. Signed-off-by: Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20220204071449.16762-9-tony@atomide.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-02-04 09:14:49 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: remove usage of CLK_IS_BASIC Remove the usage of CLK_IS_BASIC flag completely from TI clock driver. In most cases, the use is completely redundant, but in some cases we need to use the new API to check if the clock is an OMAP clock or not. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Tested-by: Keerthy <j-keerthy@ti.com>
2019-01-15 11:15:14 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: fix double free in of_ti_divider_clk_setup() The "div" pointer is freed in _register_divider() and again in of_ti_divider_clk_setup(). Delete the free in _register_divider() Fixes: fbbc18591585 ("clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://lore.kernel.org/r/6d36eeec-6c8a-4f11-a579-aa3cd7c38749@moroto.mountain Reviewed-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-02 10:04:36 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:46:53 +02:00
clk: ti: divider: cleanup ti_clk_parse_divider_data API Cleanup the ti_clk_parse_divider_data to pass the divider data struct directly instead of individual values of it. This makes it easier to modify the implementation later on. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:09 +03:00
clk: ti: divider: add support for legacy divider init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-16 18:20:50 +02:00
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:46:53 +02:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
clk: ti: divider: add support for legacy divider init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-16 18:20:50 +02:00
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:46:53 +02:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:46:53 +02:00
clk: ti: divider: add support for legacy divider init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-16 18:20:50 +02:00
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:46:53 +02:00
clk: ti: divider: add support for legacy divider init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-16 18:20:50 +02:00
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:46:53 +02:00
Convert 'alloc_obj' family to use the new default GFP_KERNEL argument This was done entirely with mindless brute force, using git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' | xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/' to convert the new alloc_obj() users that had a simple GFP_KERNEL argument to just drop that argument. Note that due to the extreme simplicity of the scripting, any slightly more complex cases spread over multiple lines would not be triggered: they definitely exist, but this covers the vast bulk of the cases, and the resulting diff is also then easier to check automatically. For the same reason the 'flex' versions will be done as a separate conversion. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21 16:37:42 -08:00
clk: ti: divider: cleanup ti_clk_parse_divider_data API Cleanup the ti_clk_parse_divider_data to pass the divider data struct directly instead of individual values of it. This makes it easier to modify the implementation later on. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:09 +03:00
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:46:53 +02:00
clk: ti: divider: add support for legacy divider init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-16 18:20:50 +02:00
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:46:53 +02:00
clk: ti: divider: add support for legacy divider init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-16 18:20:50 +02:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
clk: ti: divider: add support for legacy divider init Legacy clock data is initialized slightly differently compared to DT clocks, thus add support for this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2014-12-16 18:20:50 +02:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
clk: ti: divider: cleanup ti_clk_parse_divider_data API Cleanup the ti_clk_parse_divider_data to pass the divider data struct directly instead of individual values of it. This makes it easier to modify the implementation later on. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:09 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
clk: ti: divider: add driver internal API for parsing divider data This can be used from the divider itself, and also from the clkctrl clocks once this is introduced. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:46:53 +02:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: Convert to using %pOFn instead of device_node.name In preparation to remove the node name pointer from struct device_node, convert printf users to use the %pOFn format specifier. Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-omap@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-28 10:44:29 -05:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
Convert 'alloc_obj' family to use the new default GFP_KERNEL argument This was done entirely with mindless brute force, using git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' | xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/' to convert the new alloc_obj() users that had a simple GFP_KERNEL argument to just drop that argument. Note that due to the extreme simplicity of the scripting, any slightly more complex cases spread over multiple lines would not be triggered: they definitely exist, but this covers the vast bulk of the cases, and the resulting diff is also then easier to check automatically. For the same reason the 'flex' versions will be done as a separate conversion. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21 16:37:42 -08:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: Convert to using %pOFn instead of device_node.name In preparation to remove the node name pointer from struct device_node, convert printf users to use the %pOFn format specifier. Cc: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: linux-clk@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-omap@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-08-28 10:44:29 -05:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: convert to use proper register definition for all accesses Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 11:24:37 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
clk: ti: convert to use proper register definition for all accesses Currently, TI clock driver uses an encapsulated struct that is cast into a void pointer to store all register addresses. This can be considered as rather nasty hackery, and prevents from expanding the register address field also. Instead, replace all the code to use proper struct in place for this, which contains all the previously used data. This patch is rather large as it is touching multiple files, but this can't be split up as we need to avoid any boot breakage. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 11:24:37 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: Improve clksel clock bit parsing for reg property Because of legacy reasons, the TI clksel composite clocks can have overlapping reg properties, and use a custom ti,bit-shift property. For the clksel clocks we can start using of the standard reg property instead of the custom ti,bit-shift property. To do this, let's add a ti_clk_get_legacy_bit_shift() helper, and make ti_clk_get_reg_addr() populate the clock bit offset. This makes it possible to update the devicetree files to use the reg property one clock at a time. Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2024-02-13 12:48:52 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
clk: ti: add support for clock latching to divider clocks Latching the clock settings is needed with certain clocks, where the setting is "cached" in HW before doing the actual re-programming of the clock source. This patch adds support for clock latching to the divider clock. Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-02-15 09:49:27 +02:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert to use min,max,mask instead of width The existing width field used to check divider validity does not provide enough protection against bad values. For example, if max divider value is 4, the smallest all-1 bitmask that can hold this value is 7, which allows values higher than 4 to be used. This typically causes unpredictable results with hardware. So far this issue hasn't been noticed as most of the dividers actually have maximum values which fit the whole bitfield, but there are certain clocks for which this is a problem, like dpll4_m4 divider on omap3 devices. Thus, convert the whole validity logic to use min,max and mask values for determining if a specific divider is valid or not. This prevents the odd cases where bad value would otherwise be written to a divider config register. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:10 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
Convert 'alloc_obj' family to use the new default GFP_KERNEL argument This was done entirely with mindless brute force, using git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' | xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/' to convert the new alloc_obj() users that had a simple GFP_KERNEL argument to just drop that argument. Note that due to the extreme simplicity of the scripting, any slightly more complex cases spread over multiple lines would not be triggered: they definitely exist, but this covers the vast bulk of the cases, and the resulting diff is also then easier to check automatically. For the same reason the 'flex' versions will be done as a separate conversion. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21 16:37:42 -08:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: convert TI divider clock to use its own data representation Instead of using the generic clock driver data struct, use one internal for the TI clock driver itself. This allows modifying the register access parts in subsequent patch. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com>
2017-02-09 14:45:45 +02:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
Convert 'alloc_obj' family to use the new default GFP_KERNEL argument This was done entirely with mindless brute force, using git grep -l '\<k[vmz]*alloc_objs*(.*, GFP_KERNEL)' | xargs sed -i 's/\(alloc_objs*(.*\), GFP_KERNEL)/\1)/' to convert the new alloc_obj() users that had a simple GFP_KERNEL argument to just drop that argument. Note that due to the extreme simplicity of the scripting, any slightly more complex cases spread over multiple lines would not be triggered: they definitely exist, but this covers the vast bulk of the cases, and the resulting diff is also then easier to check automatically. For the same reason the 'flex' versions will be done as a separate conversion. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2026-02-21 16:37:42 -08:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00
clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table Cleanup couple of TI divider clock internal APIs. These currently pass huge amount of parameters, which makes it difficult to track what is going on. Abstract most of these under struct clk_omap_div which gets passed over the APIs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Adam Ford <aford173@gmail.com>
2019-10-02 15:06:08 +03:00
CLK: ti: add support for ti divider-clock This patch adds support for TI divider clock binding, which simply uses the basic clock divider to provide the features needed. Signed-off-by: Tero Kristo <t-kristo@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-09-13 12:02:15 +03:00