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linux/drivers/gpio/gpio-octeon.c

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gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: Include the right header This is a GPIO driver, include only <linux/gpio/driver.h>. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-05-24 14:22:04 +02:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: use gpiochip data pointer This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Reviewed-by: David Daney <david.daney@cavium.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-07 11:13:27 +01:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: use new GPIO line value setter callbacks struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250610-gpiochip-set-rv-gpio-v1-10-3a9a3c1472ff@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-06-10 14:33:20 +02:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: use gpiochip data pointer This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Reviewed-by: David Daney <david.daney@cavium.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-07 11:13:27 +01:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: use new GPIO line value setter callbacks struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Link: https://lore.kernel.org/r/20250610-gpiochip-set-rv-gpio-v1-10-3a9a3c1472ff@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-06-10 14:33:20 +02:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: use gpiochip data pointer This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Reviewed-by: David Daney <david.daney@cavium.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-07 11:13:27 +01:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: use gpiochip data pointer This makes the driver use the data pointer added to the gpio_chip to store a pointer to the state container instead of relying on container_of(). Reviewed-by: David Daney <david.daney@cavium.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-07 11:13:27 +01:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: Convert to use devm_ioremap_resource Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-18 21:05:16 +08:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
drivers: gpio: octeon: use devm_platform_ioremap_resource() Use the new helper that wraps the calls to platform_get_resource() and devm_ioremap_resource() together. Signed-off-by: Enrico Weigelt, metux IT consult <info@metux.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-03-11 20:48:21 +01:00
gpio: octeon: Convert to use devm_ioremap_resource Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-18 21:05:16 +08:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: Convert to use devm_ioremap_resource Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-18 21:05:16 +08:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: change member .dev to .parent The name .dev in a struct is normally reserved for a struct device that is let us say a superclass to the thing described by the struct. struct gpio_chip stands out by confusingly using a struct device *dev to point to the parent device (such as a platform_device) that represents the hardware. As we want to give gpio_chip:s real devices, this is not working. We need to rename this member to parent. This was done by two coccinelle scripts, I guess it is possible to combine them into one, but I don't know such stuff. They look like this: @@ struct gpio_chip *var; @@ -var->dev +var->parent and: @@ struct gpio_chip var; @@ -var.dev +var.parent and: @@ struct bgpio_chip *var; @@ -var->gc.dev +var->gc.parent Plus a few instances of bgpio that I couldn't figure out how to teach Coccinelle to rewrite. This patch hits all over the place, but I *strongly* prefer this solution to any piecemal approaches that just exercise patch mechanics all over the place. It mainly hits drivers/gpio and drivers/pinctrl which is my own backyard anyway. Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Richard Purdie <rpurdie@rpsys.net> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Alek Du <alek.du@intel.com> Cc: Jaroslav Kysela <perex@perex.cz> Cc: Takashi Iwai <tiwai@suse.com> Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Jiri Kosina <jkosina@suse.cz> Acked-by: Hans-Christian Egtvedt <egtvedt@samfundet.no> Acked-by: Jacek Anaszewski <j.anaszewski@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-04 09:56:26 +01:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio/pinctrl: make gpio_chip members typed boolean This switches the two members of struct gpio_chip that were defined as unsigned foo:1 to bool, because that is indeed what they are. Switch all users in the gpio and pinctrl subsystems to assign these values with true/false instead of 0/1. The users outside these subsystems will survive since true/false is 1/0, atleast we set some kind of more strict typing example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-04 14:42:46 +01:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
treewide: rename GPIO set callbacks back to their original names The conversion of all GPIO drivers to using the .set_rv() and .set_multiple_rv() callbacks from struct gpio_chip (which - unlike their predecessors - return an integer and allow the controller drivers to indicate failures to users) is now complete and the legacy ones have been removed. Rename the new callbacks back to their original names in one sweeping change. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-07-17 15:21:26 +02:00
gpio: octeon: Use devm_gpiochip_add_data() for gpio registration Use devm_gpiochip_add_data() for GPIO registration and remove the need of driver callback .remove. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
2016-02-22 17:43:28 +05:30
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: Convert to use devm_ioremap_resource Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-18 21:05:16 +08:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: Convert to use devm_ioremap_resource Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-18 21:05:16 +08:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00
gpio: octeon: Constify octeon_gpio_match table Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-03-18 21:06:06 +08:00
gpio MIPS/OCTEON: Add a driver for OCTEON's on-chip GPIO pins. The SOCs in the OCTEON family have 16 (or in some cases 20) on-chip GPIO pins, this driver handles them all. Configuring the pins as interrupt sources is handled elsewhere (OCTEON's irq handling code). Signed-off-by: David Daney <david.daney@cavium.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5633/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-29 14:29:10 -07:00