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linux/drivers/mfd/tqmx86.c

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mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Specify IO port register range more precisely Registers 0x160..0x17f are unassigned. Use 0x180 as base register and update offets accordingly. Also change the size of the range to include 0x19f. While 0x19f is currently reserved for future extensions, so are several of the previous registers up to 0x19e, and it is weird to leave out just the last one. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/db4677ac318b1283c8956f637f409995a30a31c3.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:45 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Specify IO port register range more precisely Registers 0x160..0x17f are unassigned. Use 0x180 as base register and update offets accordingly. Also change the size of the range to include 0x19f. While 0x19f is currently reserved for future extensions, so are several of the previous registers up to 0x19e, and it is weird to leave out just the last one. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/db4677ac318b1283c8956f637f409995a30a31c3.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:45 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Correct board names for TQMxE39x It seems that this driver was developed based on preliminary documentation. Report the correct names for all TQMxE39x variants, as they are used by the released hardware revisions: - Fix names for TQMxE39C1/C2 board IDs - Distinguish TQMxE39M and TQMxE39S, which use the same board ID The TQMxE39M/S are distinguished using the SAUC (Sanctioned Alternate Uses Configuration) register of the GPIO controller. This also prepares for the correct handling of the differences between the GPIO controllers of our COMe and SMARC modules. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/aca9a7cb42a85181bcb456c437554d2728e708ec.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:46 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Add board definitions for TQMx120UC, TQMx130UC and TQMxE41S This adds support for 3 new TQMx86 COMs: - TQMx120UC/TQMx130UC: COM Express Compact Type 6 modules with 12th and 13th Generation Intel Core CPUs ([1, 2]) - TQMxE41S: SMARC 2.1 module with Intel Atom x7000E and compatible CPUs [3] [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx120uc/ [2] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx130uc/ [3] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxe41s/ Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/90ddebda96d29246992b58ae0231a511f6424211.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:28 +01:00
mfd: tqmx86: Add support for TQMx110EB and TQMxE40x Add the board IDs for the TQMx110EB and the TQMxE40x family. All use a 24MHz LPC clock. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 12:00:51 +02:00
mfd: tqmx86: Add board definitions for TQMx120UC, TQMx130UC and TQMxE41S This adds support for 3 new TQMx86 COMs: - TQMx120UC/TQMx130UC: COM Express Compact Type 6 modules with 12th and 13th Generation Intel Core CPUs ([1, 2]) - TQMxE41S: SMARC 2.1 module with Intel Atom x7000E and compatible CPUs [3] [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx120uc/ [2] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx130uc/ [3] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxe41s/ Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/90ddebda96d29246992b58ae0231a511f6424211.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:28 +01:00
mfd: tqmx86: Add board definitions for TQMxCU1-HPCM and TQMxCU2-HPCM This adds support for 2 new TQMx86 COMs: - TQMxCU1-HPCM (COM-HPC Mini Module with Intel Core Ultra Processors [1]) - TQMxCU2-HPCM (in development) [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxcu1-hpcm/ Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://patch.msgid.link/20251007095424.138878-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-10-07 11:54:24 +02:00
mfd: tqmx86: Specify IO port register range more precisely Registers 0x160..0x17f are unassigned. Use 0x180 as base register and update offets accordingly. Also change the size of the range to include 0x19f. While 0x19f is currently reserved for future extensions, so are several of the previous registers up to 0x19e, and it is weird to leave out just the last one. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/db4677ac318b1283c8956f637f409995a30a31c3.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:45 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Add I2C IRQ support The i2c-ocores controller can run in interrupt mode on tqmx86 modules. Add a module parameter to allow configuring the IRQ number, similar to the handling of the GPIO IRQ. The new code and module parameter refer to the I2C controller as "I2C1", as the TQMx86 PLD actually contains a second I2C controller, for which driver support will be added in the future. Signed-off-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/c1b0769e00a8a4e463cffe725e939b0e5c2992c8.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:32 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Correct board names for TQMxE39x It seems that this driver was developed based on preliminary documentation. Report the correct names for all TQMxE39x variants, as they are used by the released hardware revisions: - Fix names for TQMxE39C1/C2 board IDs - Distinguish TQMxE39M and TQMxE39S, which use the same board ID The TQMxE39M/S are distinguished using the SAUC (Sanctioned Alternate Uses Configuration) register of the GPIO controller. This also prepares for the correct handling of the differences between the GPIO controllers of our COMe and SMARC modules. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/aca9a7cb42a85181bcb456c437554d2728e708ec.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:46 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Do not access I2C_DETECT register through io_base The I2C_DETECT register is at IO port 0x1a7, which is outside the range passed to devm_ioport_map() for io_base, and was only working because there aren't actually any bounds checks for IO port accesses. Extending the range does not seem like a good solution here, as it would then conflict with the IO resource assigned to the I2C controller. As this is just a one-off access during probe, use a simple inb() instead. While we're at it, drop the unused define TQMX86_REG_I2C_INT_EN. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/e8300a30f0791afb67d79db8089fb6004855f378.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:44 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Improve gpio_irq module parameter description Clarify that "7, 9, 12" refers to the valid arguments that can be passed as gpio_irq. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/3275f436b66f6807c02256bc852d39b03ebd64d5.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:29 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Add I2C IRQ support The i2c-ocores controller can run in interrupt mode on tqmx86 modules. Add a module parameter to allow configuring the IRQ number, similar to the handling of the GPIO IRQ. The new code and module parameter refer to the I2C controller as "I2C1", as the TQMx86 PLD actually contains a second I2C controller, for which driver support will be added in the future. Signed-off-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/c1b0769e00a8a4e463cffe725e939b0e5c2992c8.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:32 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Make IRQ setup errors non-fatal GPIO IRQ setup can fail either because an invalid IRQ was passed as a parameter, or because the GPIO controller does not support interrupts. Neither is severe enough to stop the whole probe; simply disable IRQ support in the GPIO resource when setup fails. The code is made a bit more robust by introduing an enum for the resource list indices instead of assuming that the IRQ is at index 0. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/2b5522362098d54c6203be6da95bbc545a21fd49.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:31 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Make IRQ setup errors non-fatal GPIO IRQ setup can fail either because an invalid IRQ was passed as a parameter, or because the GPIO controller does not support interrupts. Neither is severe enough to stop the whole probe; simply disable IRQ support in the GPIO resource when setup fails. The code is made a bit more robust by introduing an enum for the resource list indices instead of assuming that the IRQ is at index 0. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/2b5522362098d54c6203be6da95bbc545a21fd49.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:31 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Fix typo in "platform" Rename variable from "ocores_platfom_data" to "ocores_platform_data". Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 12:00:50 +02:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Fix typo in "platform" Rename variable from "ocores_platfom_data" to "ocores_platform_data". Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 12:00:50 +02:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Correct board names for TQMxE39x It seems that this driver was developed based on preliminary documentation. Report the correct names for all TQMxE39x variants, as they are used by the released hardware revisions: - Fix names for TQMxE39C1/C2 board IDs - Distinguish TQMxE39M and TQMxE39S, which use the same board ID The TQMxE39M/S are distinguished using the SAUC (Sanctioned Alternate Uses Configuration) register of the GPIO controller. This also prepares for the correct handling of the differences between the GPIO controllers of our COMe and SMARC modules. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/aca9a7cb42a85181bcb456c437554d2728e708ec.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:46 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Correct board names for TQMxE39x It seems that this driver was developed based on preliminary documentation. Report the correct names for all TQMxE39x variants, as they are used by the released hardware revisions: - Fix names for TQMxE39C1/C2 board IDs - Distinguish TQMxE39M and TQMxE39S, which use the same board ID The TQMxE39M/S are distinguished using the SAUC (Sanctioned Alternate Uses Configuration) register of the GPIO controller. This also prepares for the correct handling of the differences between the GPIO controllers of our COMe and SMARC modules. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/aca9a7cb42a85181bcb456c437554d2728e708ec.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:46 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Add board definitions for TQMx120UC, TQMx130UC and TQMxE41S This adds support for 3 new TQMx86 COMs: - TQMx120UC/TQMx130UC: COM Express Compact Type 6 modules with 12th and 13th Generation Intel Core CPUs ([1, 2]) - TQMxE41S: SMARC 2.1 module with Intel Atom x7000E and compatible CPUs [3] [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx120uc/ [2] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx130uc/ [3] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxe41s/ Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/90ddebda96d29246992b58ae0231a511f6424211.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:28 +01:00
mfd: tqmx86: Add support for TQMx110EB and TQMxE40x Add the board IDs for the TQMx110EB and the TQMxE40x family. All use a 24MHz LPC clock. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 12:00:51 +02:00
mfd: tqmx86: Add board definitions for TQMx120UC, TQMx130UC and TQMxE41S This adds support for 3 new TQMx86 COMs: - TQMx120UC/TQMx130UC: COM Express Compact Type 6 modules with 12th and 13th Generation Intel Core CPUs ([1, 2]) - TQMxE41S: SMARC 2.1 module with Intel Atom x7000E and compatible CPUs [3] [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx120uc/ [2] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx130uc/ [3] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxe41s/ Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/90ddebda96d29246992b58ae0231a511f6424211.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:28 +01:00
mfd: tqmx86: Add board definitions for TQMxCU1-HPCM and TQMxCU2-HPCM This adds support for 2 new TQMx86 COMs: - TQMxCU1-HPCM (COM-HPC Mini Module with Intel Core Ultra Processors [1]) - TQMxCU2-HPCM (in development) [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxcu1-hpcm/ Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://patch.msgid.link/20251007095424.138878-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-10-07 11:54:24 +02:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Assume 24MHz LPC clock for unknown boards All future TQMx86 modules should use a 24MHz LPC clock. Warn about unknown boards, but assume this is the case. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 12:00:53 +02:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Add board definitions for TQMx120UC, TQMx130UC and TQMxE41S This adds support for 3 new TQMx86 COMs: - TQMx120UC/TQMx130UC: COM Express Compact Type 6 modules with 12th and 13th Generation Intel Core CPUs ([1, 2]) - TQMxE41S: SMARC 2.1 module with Intel Atom x7000E and compatible CPUs [3] [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx120uc/ [2] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx130uc/ [3] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxe41s/ Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/90ddebda96d29246992b58ae0231a511f6424211.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:28 +01:00
mfd: tqmx86: Add support for TQMx110EB and TQMxE40x Add the board IDs for the TQMx110EB and the TQMxE40x family. All use a 24MHz LPC clock. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 12:00:51 +02:00
mfd: tqmx86: Add board definitions for TQMx120UC, TQMx130UC and TQMxE41S This adds support for 3 new TQMx86 COMs: - TQMx120UC/TQMx130UC: COM Express Compact Type 6 modules with 12th and 13th Generation Intel Core CPUs ([1, 2]) - TQMxE41S: SMARC 2.1 module with Intel Atom x7000E and compatible CPUs [3] [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx120uc/ [2] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmx130uc/ [3] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxe41s/ Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/90ddebda96d29246992b58ae0231a511f6424211.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:28 +01:00
mfd: tqmx86: Add board definitions for TQMxCU1-HPCM and TQMxCU2-HPCM This adds support for 2 new TQMx86 COMs: - TQMxCU1-HPCM (COM-HPC Mini Module with Intel Core Ultra Processors [1]) - TQMxCU2-HPCM (in development) [1] https://www.tq-group.com/en/products/tq-embedded/x86-architecture/tqmxcu1-hpcm/ Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://patch.msgid.link/20251007095424.138878-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2025-10-07 11:54:24 +02:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Correct board names for TQMxE39x It seems that this driver was developed based on preliminary documentation. Report the correct names for all TQMxE39x variants, as they are used by the released hardware revisions: - Fix names for TQMxE39C1/C2 board IDs - Distinguish TQMxE39M and TQMxE39S, which use the same board ID The TQMxE39M/S are distinguished using the SAUC (Sanctioned Alternate Uses Configuration) register of the GPIO controller. This also prepares for the correct handling of the differences between the GPIO controllers of our COMe and SMARC modules. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/aca9a7cb42a85181bcb456c437554d2728e708ec.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:46 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Assume 24MHz LPC clock for unknown boards All future TQMx86 modules should use a 24MHz LPC clock. Warn about unknown boards, but assume this is the case. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 12:00:53 +02:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Refactor GPIO IRQ setup Move IRQ setup into a helper function. The string "GPIO" for error messages is replaced with a label argument to prepare for reusing the function for the I2C IRQ. No functional change intended. Co-developed-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/97f481334f480a113b7076e76f994e0e73ee5aa5.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:30 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Refactor GPIO IRQ setup Move IRQ setup into a helper function. The string "GPIO" for error messages is replaced with a label argument to prepare for reusing the function for the I2C IRQ. No functional change intended. Co-developed-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/97f481334f480a113b7076e76f994e0e73ee5aa5.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:30 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Correct board names for TQMxE39x It seems that this driver was developed based on preliminary documentation. Report the correct names for all TQMxE39x variants, as they are used by the released hardware revisions: - Fix names for TQMxE39C1/C2 board IDs - Distinguish TQMxE39M and TQMxE39S, which use the same board ID The TQMxE39M/S are distinguished using the SAUC (Sanctioned Alternate Uses Configuration) register of the GPIO controller. This also prepares for the correct handling of the differences between the GPIO controllers of our COMe and SMARC modules. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/aca9a7cb42a85181bcb456c437554d2728e708ec.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:46 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Do not access I2C_DETECT register through io_base The I2C_DETECT register is at IO port 0x1a7, which is outside the range passed to devm_ioport_map() for io_base, and was only working because there aren't actually any bounds checks for IO port accesses. Extending the range does not seem like a good solution here, as it would then conflict with the IO resource assigned to the I2C controller. As this is just a one-off access during probe, use a simple inb() instead. While we're at it, drop the unused define TQMX86_REG_I2C_INT_EN. Fixes: 2f17dd34ffed ("mfd: tqmx86: IO controller with I2C, Wachdog and GPIO") Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/e8300a30f0791afb67d79db8089fb6004855f378.1676892223.git.matthias.schiffer@ew.tq-group.com
2023-02-20 12:25:44 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Refactor GPIO IRQ setup Move IRQ setup into a helper function. The string "GPIO" for error messages is replaced with a label argument to prepare for reusing the function for the I2C IRQ. No functional change intended. Co-developed-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/97f481334f480a113b7076e76f994e0e73ee5aa5.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:30 +01:00
mfd: tqmx86: Make IRQ setup errors non-fatal GPIO IRQ setup can fail either because an invalid IRQ was passed as a parameter, or because the GPIO controller does not support interrupts. Neither is severe enough to stop the whole probe; simply disable IRQ support in the GPIO resource when setup fails. The code is made a bit more robust by introduing an enum for the resource list indices instead of assuming that the IRQ is at index 0. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/2b5522362098d54c6203be6da95bbc545a21fd49.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:31 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Assume 24MHz LPC clock for unknown boards All future TQMx86 modules should use a 24MHz LPC clock. Warn about unknown boards, but assume this is the case. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 12:00:53 +02:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Add I2C IRQ support The i2c-ocores controller can run in interrupt mode on tqmx86 modules. Add a module parameter to allow configuring the IRQ number, similar to the handling of the GPIO IRQ. The new code and module parameter refer to the I2C controller as "I2C1", as the TQMx86 PLD actually contains a second I2C controller, for which driver support will be added in the future. Signed-off-by: Gregor Herburger <gregor.herburger@tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Link: https://lore.kernel.org/r/c1b0769e00a8a4e463cffe725e939b0e5c2992c8.1731325758.git.matthias.schiffer@ew.tq-group.com Signed-off-by: Lee Jones <lee@kernel.org>
2024-11-11 15:10:32 +01:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Add support for TQ-Systems DMI IDs Newer TQMx86 modules use TQ-Systems instead of TQ-Group as their vendor ID. Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2021-07-16 12:00:52 +02:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00
mfd: tqmx86: Fix a typo in MODULE_DESCRIPTION Based on the file name and code of the driver, it is likely that this module is related to TQMx86 and not TQx86. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2020-04-12 23:30:47 +02:00
mfd: tqmx86: IO controller with I2C, Wachdog and GPIO The QMX86 is a PLD present on some TQ-Systems ComExpress modules. It provides 1 or 2 I2C bus masters, 8 GPIOs and a watchdog timer. Add an MFD which will instantiate the individual drivers. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Lee Jones <lee.jones@linaro.org>
2019-02-09 00:06:22 +01:00