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linux/arch/powerpc/sysdev/cpm1.c

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[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] CPM: Rename commproc to cpm1 and cpm2_common.c to cpm2.c Rename commproc.[ch] to cpm1.[ch] to be more consistent with cpm2. Also rename cpm2_common.c to cpm2.c as suggested by Scott Wood. Adjust the includes accordingly. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-25 15:31:42 +01:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] cpm: Describe multi-user ram in its own device node. The way the current CPM binding describes available multi-user (a.k.a. dual-ported) RAM doesn't work well when there are multiple free regions, and it doesn't work at all if the region doesn't begin at the start of the muram area (as the hardware needs to be programmed with offsets into this area). The latter situation can happen with SMC UARTs on CPM2, as its parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't support moving it. It is now described with a muram node, similar to QE. The current CPM binding is sufficiently recent (i.e. never appeared in an official release) that compatibility with existing device trees is not an issue. The code supporting the new binding is shared between cpm1 and cpm2, rather than remain separated. QE should be able to use this code as well, once minor fixes are made to its device trees. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-28 14:06:16 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
powerpc: Fixup last users of irq_chip->typename The typename member of struct irq_chip was kept for migration purposes and is obsolete since more than 2 years. Fix up the leftovers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: linuxppc-dev@ozlabs.org Acked-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-11-18 23:44:21 +00:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
powerpc: Remove get_irq_desc() get_irq_desc() is a powerpc-specific version of irq_to_desc(). That is reason enough to remove it, but it also doesn't know about sparse irq_desc support which irq_to_desc() does (when we enable it). Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-10-13 19:44:51 +00:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] Whitespace cleanup in arch/powerpc Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-21 02:36:19 +10:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
powerpc: Fix irq_alloc_host() reference counting and callers When I changed irq_alloc_host() to take an of_node (52964f87c64e6c6ea671b5bf3030fb1494090a48: "Add an optional device_node pointer to the irq_host"), I botched the reference counting semantics. Stephen pointed out that it's irq_alloc_host()'s business if it needs to take an additional reference to the device_node, the caller shouldn't need to care. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-05-26 12:12:32 +10:00
[POWERPC] Add an optional device_node pointer to the irq_host The majority of irq_host implementations (3 out of 4) are associated with a device_node, and need to stash it somewhere. Rather than having it somewhere different for each host, add an optional device_node pointer to the irq_host structure. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-28 18:47:54 +10:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] Whitespace cleanup in arch/powerpc Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-08-21 02:36:19 +10:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] cpm: Describe multi-user ram in its own device node. The way the current CPM binding describes available multi-user (a.k.a. dual-ported) RAM doesn't work well when there are multiple free regions, and it doesn't work at all if the region doesn't begin at the start of the muram area (as the hardware needs to be programmed with offsets into this area). The latter situation can happen with SMC UARTs on CPM2, as its parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't support moving it. It is now described with a muram node, similar to QE. The current CPM binding is sufficiently recent (i.e. never appeared in an official release) that compatibility with existing device trees is not an issue. The code supporting the new binding is shared between cpm1 and cpm2, rather than remain separated. QE should be able to use this code as well, once minor fixes are made to its device trees. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-28 14:06:16 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] cpm: Describe multi-user ram in its own device node. The way the current CPM binding describes available multi-user (a.k.a. dual-ported) RAM doesn't work well when there are multiple free regions, and it doesn't work at all if the region doesn't begin at the start of the muram area (as the hardware needs to be programmed with offsets into this area). The latter situation can happen with SMC UARTs on CPM2, as its parameter RAM is relocatable, u-boot puts it at zero, and the kernel doesn't support moving it. It is now described with a muram node, similar to QE. The current CPM binding is sufficiently recent (i.e. never appeared in an official release) that compatibility with existing device trees is not an issue. The code supporting the new binding is shared between cpm1 and cpm2, rather than remain separated. QE should be able to use this code as well, once minor fixes are made to its device trees. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-28 14:06:16 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] Move CPM command handling into the cpm drivers This patch moves the CPM command handling into commproc.c for CPM1 and cpm2_common.c. This is yet another preparation to get rid of drivers accessing the CPM via the global cpmp. Signed-off-by: Jochen Friedrich <jochen@scram.de> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
2007-11-26 18:03:40 +01:00
[POWERPC] Replace remaining __FUNCTION__ occurrences __FUNCTION__ is gcc-specific, use __func__ Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2008-03-29 08:21:07 +11:00
[POWERPC] Move CPM command handling into the cpm drivers This patch moves the CPM command handling into commproc.c for CPM1 and cpm2_common.c. This is yet another preparation to get rid of drivers accessing the CPM via the global cpmp. Signed-off-by: Jochen Friedrich <jochen@scram.de> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
2007-11-26 18:03:40 +01:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Infrastructure code cleanup. 1. Keep a global mpc8xx_immr mapping, rather than constantly creating temporary mappings. 2. Look for new fsl,cpm1 and fsl,cpm1-pic names. 3. Always reset the CPM when not using the udbg console; this is required in case the firmware initialized a device that is incompatible with one that the kernel is about to use. 4. Remove some superfluous casts and header includes. 5. Change a usage of IMAP_ADDR to get_immrbase(). 6. Use phys_addr_t, not uint, for dpram_pbase. 7. Various sparse-related fixes, such as __iomem annotations. 8. Remove mpc8xx_show_cpuinfo, which doesn't provide anything useful beyond the generic cpuinfo handler. 9. Move prototypes for 8xx support functions from board files to sysdev/commproc.h. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-09-14 14:22:36 -05:00
[POWERPC] CPM: Rename commproc to cpm1 and cpm2_common.c to cpm2.c Rename commproc.[ch] to cpm1.[ch] to be more consistent with cpm2. Also rename cpm2_common.c to cpm2.c as suggested by Scott Wood. Adjust the includes accordingly. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-01-25 15:31:42 +01:00
[POWERPC] 8xx: powerpc port of core CPM PIC This covers common CPM access functions, CPM interrupt controller code, micropatch and a few compatibility things to kee the same driver base working with arch/ppc. This version is refined with all the comments (mostly PIC-related) addressed. Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2007-01-24 22:41:24 +03:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
[POWERPC] Add support for PORTA and PORTB odr registers PORTA and PORTB have odr registers, as well. However, the PORTB odr register is only 16bit. Signed-off-by: Jochen Friedrich <jochen@scram.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
2007-11-22 17:54:13 +01:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
[POWERPC] Add support for PORTA and PORTB odr registers PORTA and PORTB have odr registers, as well. However, the PORTB odr register is only 16bit. Signed-off-by: Jochen Friedrich <jochen@scram.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
2007-11-22 17:54:13 +01:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
[POWERPC] Add support for PORTA and PORTB odr registers PORTA and PORTB have odr registers, as well. However, the PORTB odr register is only 16bit. Signed-off-by: Jochen Friedrich <jochen@scram.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
2007-11-22 17:54:13 +01:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
[POWERPC] Add support for PORTA and PORTB odr registers PORTA and PORTB have odr registers, as well. However, the PORTB odr register is only 16bit. Signed-off-by: Jochen Friedrich <jochen@scram.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
2007-11-22 17:54:13 +01:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
[POWERPC] Add support for PORTA and PORTB odr registers PORTA and PORTB have odr registers, as well. However, the PORTB odr register is only 16bit. Signed-off-by: Jochen Friedrich <jochen@scram.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Vitaly Bordug <vitb@kernel.crashing.org>
2007-11-22 17:54:13 +01:00
[POWERPC] 8xx: Add pin and clock setting functions. These let board code set up pins and clocks without having to put magic numbers directly into the registers. The clock function is mostly duplicated from the cpm2 version; hopefully this stuff can be merged at some point. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2007-07-16 17:22:01 -05:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00
powerpc/cpm1: Fix race condition in CPM1 GPIO library. The CPM1 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Based on the CPM2 patch from Laurent Pinchart <laurentp@cse-semaphore.com>, commit 639d64456e20cbfc866b18dc03cf9f9babc9c7cd. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-08-27 12:32:25 +02:00
powerpc: implement GPIO LIB API on CPM1 Freescale SoC. This patch implement GPIO LIB support for the CPM1 GPIOs. Signed-off-by: Jochen Friedrich <jochen@scram.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-03 02:18:23 +10:00