2007-11-12 20:54:30 +01:00
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2007-11-17 15:37:31 +01:00
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2012-12-20 21:51:55 +00:00
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2009-02-05 16:21:53 +01:00
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2007-11-12 20:54:30 +01:00
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2012-09-10 12:41:45 +01:00
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2011-05-08 18:55:19 +01:00
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2012-10-08 16:28:08 -07:00
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2007-11-12 20:54:30 +01:00
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2012-09-10 12:41:45 +01:00
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2012-04-04 19:39:58 +02:00
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2007-11-06 21:35:08 +01:00
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2007-11-06 23:30:30 +01:00
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2008-01-30 13:31:03 +01:00
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2008-06-17 12:19:34 +01:00
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2008-05-05 23:19:50 +02:00
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2012-10-25 14:16:43 +02:00
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2008-02-09 10:46:40 +01:00
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2008-02-02 15:10:34 -05:00
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2011-06-01 19:05:09 +01:00
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2010-11-16 21:49:01 +01:00
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2008-07-23 21:27:05 -07:00
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2008-02-02 15:10:35 -05:00
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2010-08-25 13:39:17 -07:00
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2011-07-14 11:44:23 +02:00
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2011-07-14 11:46:03 +02:00
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2008-07-26 13:52:50 +02:00
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2009-01-07 11:05:10 +01:00
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2009-06-17 16:28:12 -07:00
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2011-12-29 13:09:51 +01:00
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2008-03-04 14:28:37 -08:00
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2010-02-25 08:34:46 -05:00
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2012-09-28 17:15:20 +09:00
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2008-08-14 15:45:11 -04:00
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ftrace/x86: Add support for -mfentry to x86_64
If the kernel is compiled with gcc 4.6.0 which supports -mfentry,
then use that instead of mcount.
With mcount, frame pointers are forced with the -pg option and we
get something like:
<can_vma_merge_before>:
55 push %rbp
48 89 e5 mov %rsp,%rbp
53 push %rbx
41 51 push %r9
e8 fe 6a 39 00 callq ffffffff81483d00 <mcount>
31 c0 xor %eax,%eax
48 89 fb mov %rdi,%rbx
48 89 d7 mov %rdx,%rdi
48 33 73 30 xor 0x30(%rbx),%rsi
48 f7 c6 ff ff ff f7 test $0xfffffffff7ffffff,%rsi
With -mfentry, frame pointers are no longer forced and the call looks
like this:
<can_vma_merge_before>:
e8 33 af 37 00 callq ffffffff81461b40 <__fentry__>
53 push %rbx
48 89 fb mov %rdi,%rbx
31 c0 xor %eax,%eax
48 89 d7 mov %rdx,%rdi
41 51 push %r9
48 33 73 30 xor 0x30(%rbx),%rsi
48 f7 c6 ff ff ff f7 test $0xfffffffff7ffffff,%rsi
This adds the ftrace hook at the beginning of the function before a
frame is set up, and allows the function callbacks to be able to access
parameters. As kprobes now can use function tracing (at least on x86)
this speeds up the kprobe hooks that are at the beginning of the
function.
Link: http://lkml.kernel.org/r/20120807194100.130477900@goodmis.org
Acked-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Andi Kleen <andi@firstfloor.org>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2011-02-09 13:32:18 -05:00
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2010-10-14 23:32:44 -04:00
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2008-05-17 00:01:36 -04:00
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2012-09-28 17:15:17 +09:00
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2008-10-06 19:06:12 -04:00
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2008-12-02 00:20:39 +01:00
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function-graph: add stack frame test
In case gcc does something funny with the stack frames, or the return
from function code, we would like to detect that.
An arch may implement passing of a variable that is unique to the
function and can be saved on entering a function and can be tested
when exiting the function. Usually the frame pointer can be used for
this purpose.
This patch also implements this for x86. Where it passes in the stack
frame of the parent function, and will test that frame on exit.
There was a case in x86_32 with optimize for size (-Os) where, for a
few functions, gcc would align the stack frame and place a copy of the
return address into it. The function graph tracer modified the copy and
not the actual return address. On return from the funtion, it did not go
to the tracer hook, but returned to the parent. This broke the function
graph tracer, because the return of the parent (where gcc did not do
this funky manipulation) returned to the location that the child function
was suppose to. This caused strange kernel crashes.
This test detected the problem and pointed out where the issue was.
This modifies the parameters of one of the functions that the arch
specific code calls, so it includes changes to arch code to accommodate
the new prototype.
Note, I notice that the parsic arch implements its own push_return_trace.
This is now a generic function and the ftrace_push_return_trace should be
used instead. This patch does not touch that code.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Helge Deller <deller@gmx.de>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
2009-06-18 12:45:08 -04:00
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2008-11-05 16:05:44 -05:00
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2009-08-24 14:43:11 -07:00
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2012-10-08 16:28:16 -07:00
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2009-01-27 17:01:14 +01:00
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2009-01-27 17:02:29 +01:00
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2008-04-20 14:35:12 -07:00
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2008-06-29 14:19:31 +04:00
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2008-07-25 01:45:33 -07:00
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2008-11-23 12:39:08 +02:00
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2010-02-10 17:25:17 +01:00
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2009-01-09 15:13:15 +01:00
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2009-01-04 15:41:25 -08:00
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2011-01-12 17:01:24 -08:00
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2010-01-08 14:42:45 -08:00
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2009-06-01 23:43:57 +05:30
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2010-04-11 18:55:56 +02:00
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2009-12-17 01:33:54 +01:00
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2010-05-15 22:57:48 +02:00
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2012-08-07 15:20:36 +02:00
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2012-08-07 15:20:40 +02:00
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2012-10-08 16:28:11 -07:00
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2009-12-17 01:33:54 +01:00
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2012-11-28 11:50:23 -08:00
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2012-01-12 17:17:33 -08:00
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2009-02-26 21:38:56 +02:00
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2009-09-19 09:40:22 +03:00
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2012-01-10 15:10:21 -08:00
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2010-09-22 23:10:23 -04:00
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2010-10-14 12:10:42 +09:00
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2010-09-27 12:46:02 +00:00
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2012-07-30 14:41:09 -07:00
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2011-10-12 11:53:17 -07:00
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2011-03-08 09:24:26 +00:00
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2010-09-27 12:46:02 +00:00
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2010-12-16 17:59:57 +01:00
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2011-08-23 15:29:42 +02:00
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2011-02-07 02:24:08 +01:00
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2011-01-12 16:59:39 -08:00
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2012-05-21 20:45:37 +02:00
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2012-10-08 16:30:04 -07:00
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2011-06-09 13:08:26 +00:00
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2011-07-13 13:14:22 +08:00
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2011-11-24 14:54:28 +02:00
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2012-05-03 10:16:43 -07:00
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2012-04-20 13:05:48 +00:00
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2012-07-30 14:42:46 -07:00
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2012-04-12 16:48:03 -05:00
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2012-04-24 11:23:15 -07:00
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2012-05-18 16:45:44 +00:00
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2013-02-04 11:03:03 +01:00
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2012-05-26 10:14:39 -07:00
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2012-05-26 11:09:53 -07:00
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2012-11-27 19:33:25 +01:00
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2012-09-09 14:56:31 +02:00
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2013-02-27 17:05:48 -08:00
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2012-09-28 14:31:03 +09:30
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2012-10-22 22:34:11 -04:00
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2012-12-20 01:16:20 +00:00
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2012-12-25 16:09:20 -05:00
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2012-12-25 19:14:55 -05:00
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2008-02-10 12:46:28 +05:30
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2009-06-06 13:58:12 +02:00
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2012-09-10 12:41:45 +01:00
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2009-06-06 13:58:12 +02:00
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x86: unify arch/x86/boot/compressed/vmlinux_*.lds
Look at the:
diff -u arch/x86/boot/compressed/vmlinux_*.lds
output and realize that they're basially exactly the same except for
trivial naming differences, and the fact that the 64-bit version has a
"pgtable" thing.
So unify them.
There's some trivial cleanup there (make the output format a Kconfig thing
rather than doing #ifdef's for it, and unify both 32-bit and 64-bit BSS
end to "_ebss", where 32-bit used to use the traditional "_end"), but
other than that it's really very mindless and straigt conversion.
For example, I think we should aim to remove "startup_32" vs "startup_64",
and just call it "startup", and get rid of one more difference. I didn't
do that.
Also, notice the comment in the unified vmlinux.lds.S talks about
"head_64" and "startup_32" which is an odd and incorrect mix, but that was
actually what the old 64-bit only lds file had, so the confusion isn't
new, and now that mixing is arguably more accurate thanks to the
vmlinux.lds.S file being shared between the two cases ;)
[ Impact: cleanup, unification ]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-04-26 10:12:47 -07:00
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2008-05-25 23:03:18 +02:00
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2008-04-29 12:48:15 +02:00
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2008-05-25 23:03:18 +02:00
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2008-04-29 12:48:15 +02:00
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2007-11-06 23:30:30 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-06 23:30:30 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-06 23:30:30 +01:00
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2008-02-01 17:45:14 +01:00
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2007-11-06 23:30:30 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-06 23:30:30 +01:00
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2010-03-10 15:23:22 -08:00
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2012-09-10 12:41:45 +01:00
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2010-03-10 15:23:22 -08:00
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2010-05-26 14:44:32 -07:00
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2010-05-26 14:44:33 -07:00
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2010-05-26 14:44:32 -07:00
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2007-11-06 23:30:30 +01:00
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2012-09-10 12:41:45 +01:00
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2007-11-06 23:30:30 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-06 23:30:30 +01:00
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2008-12-16 11:40:27 +00:00
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2007-11-06 23:30:30 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-06 23:30:30 +01:00
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2008-01-30 13:33:35 +01:00
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2008-10-15 22:01:38 -07:00
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2008-01-30 13:33:35 +01:00
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2007-11-06 23:30:30 +01:00
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2012-09-10 12:41:45 +01:00
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2007-11-06 23:30:30 +01:00
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2007-11-06 21:35:08 +01:00
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2012-09-10 12:41:45 +01:00
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2007-11-06 21:35:08 +01:00
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2008-01-31 17:35:06 -08:00
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2007-11-06 23:30:30 +01:00
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2008-10-16 19:00:08 -04:00
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2008-04-28 02:12:22 -07:00
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2012-01-26 00:09:14 +01:00
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2008-01-30 13:33:32 +01:00
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2009-01-27 12:56:48 +09:00
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2008-01-30 13:32:51 +01:00
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2009-08-14 15:00:49 +09:00
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2009-02-20 16:29:09 +09:00
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2007-12-08 02:12:39 +01:00
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2007-12-08 02:14:00 +01:00
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2007-11-06 23:30:30 +01:00
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2008-04-09 11:03:37 +02:00
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2009-03-31 15:23:17 -07:00
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2009-09-01 18:25:07 -07:00
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2012-10-02 11:16:47 -07:00
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2009-09-01 18:25:07 -07:00
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2008-01-30 13:32:27 +01:00
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2007-11-06 23:30:30 +01:00
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2010-04-21 15:23:44 +01:00
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2007-12-04 17:19:07 +01:00
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2007-11-06 23:30:30 +01:00
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2009-02-09 22:17:40 +09:00
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2009-02-09 22:17:40 +09:00
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2009-02-09 22:17:40 +09:00
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2010-03-05 17:34:46 +01:00
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2010-08-19 20:10:29 +02:00
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uprobes, mm, x86: Add the ability to install and remove uprobes breakpoints
Add uprobes support to the core kernel, with x86 support.
This commit adds the kernel facilities, the actual uprobes
user-space ABI and perf probe support comes in later commits.
General design:
Uprobes are maintained in an rb-tree indexed by inode and offset
(the offset here is from the start of the mapping). For a unique
(inode, offset) tuple, there can be at most one uprobe in the
rb-tree.
Since the (inode, offset) tuple identifies a unique uprobe, more
than one user may be interested in the same uprobe. This provides
the ability to connect multiple 'consumers' to the same uprobe.
Each consumer defines a handler and a filter (optional). The
'handler' is run every time the uprobe is hit, if it matches the
'filter' criteria.
The first consumer of a uprobe causes the breakpoint to be
inserted at the specified address and subsequent consumers are
appended to this list. On subsequent probes, the consumer gets
appended to the existing list of consumers. The breakpoint is
removed when the last consumer unregisters. For all other
unregisterations, the consumer is removed from the list of
consumers.
Given a inode, we get a list of the mms that have mapped the
inode. Do the actual registration if mm maps the page where a
probe needs to be inserted/removed.
We use a temporary list to walk through the vmas that map the
inode.
- The number of maps that map the inode, is not known before we
walk the rmap and keeps changing.
- extending vm_area_struct wasn't recommended, it's a
size-critical data structure.
- There can be more than one maps of the inode in the same mm.
We add callbacks to the mmap methods to keep an eye on text vmas
that are of interest to uprobes. When a vma of interest is mapped,
we insert the breakpoint at the right address.
Uprobe works by replacing the instruction at the address defined
by (inode, offset) with the arch specific breakpoint
instruction. We save a copy of the original instruction at the
uprobed address.
This is needed for:
a. executing the instruction out-of-line (xol).
b. instruction analysis for any subsequent fixups.
c. restoring the instruction back when the uprobe is unregistered.
We insert or delete a breakpoint instruction, and this
breakpoint instruction is assumed to be the smallest instruction
available on the platform. For fixed size instruction platforms
this is trivially true, for variable size instruction platforms
the breakpoint instruction is typically the smallest (often a
single byte).
Writing the instruction is done by COWing the page and changing
the instruction during the copy, this even though most platforms
allow atomic writes of the breakpoint instruction. This also
mirrors the behaviour of a ptrace() memory write to a PRIVATE
file map.
The core worker is derived from KSM's replace_page() logic.
In essence, similar to KSM:
a. allocate a new page and copy over contents of the page that
has the uprobed vaddr
b. modify the copy and insert the breakpoint at the required
address
c. switch the original page with the copy containing the
breakpoint
d. flush page tables.
replace_page() is being replicated here because of some minor
changes in the type of pages and also because Hugh Dickins had
plans to improve replace_page() for KSM specific work.
Instruction analysis on x86 is based on instruction decoder and
determines if an instruction can be probed and determines the
necessary fixups after singlestep. Instruction analysis is done
at probe insertion time so that we avoid having to repeat the
same analysis every time a probe is hit.
A lot of code here is due to the improvement/suggestions/inputs
from Peter Zijlstra.
Changelog:
(v10):
- Add code to clear REX.B prefix as suggested by Denys Vlasenko
and Masami Hiramatsu.
(v9):
- Use insn_offset_modrm as suggested by Masami Hiramatsu.
(v7):
Handle comments from Peter Zijlstra:
- Dont take reference to inode. (expect inode to uprobe_register to be sane).
- Use PTR_ERR to set the return value.
- No need to take reference to inode.
- use PTR_ERR to return error value.
- register and uprobe_unregister share code.
(v5):
- Modified del_consumer as per comments from Peter.
- Drop reference to inode before dropping reference to uprobe.
- Use i_size_read(inode) instead of inode->i_size.
- Ensure uprobe->consumers is NULL, before __uprobe_unregister() is called.
- Includes errno.h as recommended by Stephen Rothwell to fix a build issue
on sparc defconfig
- Remove restrictions while unregistering.
- Earlier code leaked inode references under some conditions while
registering/unregistering.
- Continue the vma-rmap walk even if the intermediate vma doesnt
meet the requirements.
- Validate the vma found by find_vma before inserting/removing the
breakpoint
- Call del_consumer under mutex_lock.
- Use hash locks.
- Handle mremap.
- Introduce find_least_offset_node() instead of close match logic in
find_uprobe
- Uprobes no more depends on MM_OWNER; No reference to task_structs
while inserting/removing a probe.
- Uses read_mapping_page instead of grab_cache_page so that the pages
have valid content.
- pass NULL to get_user_pages for the task parameter.
- call SetPageUptodate on the new page allocated in write_opcode.
- fix leaking a reference to the new page under certain conditions.
- Include Instruction Decoder if Uprobes gets defined.
- Remove const attributes for instruction prefix arrays.
- Uses mm_context to know if the application is 32 bit.
Signed-off-by: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
Also-written-by: Jim Keniston <jkenisto@us.ibm.com>
Reviewed-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Christoph Hellwig <hch@infradead.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Roland McGrath <roland@hack.frob.com>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: Arnaldo Carvalho de Melo <acme@infradead.org>
Cc: Anton Arapov <anton@redhat.com>
Cc: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Denys Vlasenko <vda.linux@googlemail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Linux-mm <linux-mm@kvack.org>
Link: http://lkml.kernel.org/r/20120209092642.GE16600@linux.vnet.ibm.com
[ Made various small edits to the commit log ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2012-02-09 14:56:42 +05:30
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2011-07-11 15:28:18 -04:00
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2007-11-09 21:56:54 +01:00
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2012-08-16 17:00:19 -03:00
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2008-02-15 17:52:48 -02:00
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2008-06-03 16:17:32 +02:00
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2012-08-16 17:00:19 -03:00
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2009-02-05 16:21:53 +01:00
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2012-08-16 17:00:19 -03:00
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2008-02-22 12:21:36 -05:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:33:32 +01:00
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2009-02-05 16:21:53 +01:00
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2008-01-30 13:33:32 +01:00
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x86: Fix performance regression caused by paravirt_ops on native kernels
Xiaohui Xin and some other folks at Intel have been looking into what's
behind the performance hit of paravirt_ops when running native.
It appears that the hit is entirely due to the paravirtualized
spinlocks introduced by:
| commit 8efcbab674de2bee45a2e4cdf97de16b8e609ac8
| Date: Mon Jul 7 12:07:51 2008 -0700
|
| paravirt: introduce a "lock-byte" spinlock implementation
The extra call/return in the spinlock path is somehow
causing an increase in the cycles/instruction of somewhere around 2-7%
(seems to vary quite a lot from test to test). The working theory is
that the CPU's pipeline is getting upset about the
call->call->locked-op->return->return, and seems to be failing to
speculate (though I haven't seen anything definitive about the precise
reasons). This doesn't entirely make sense, because the performance
hit is also visible on unlock and other operations which don't involve
locked instructions. But spinlock operations clearly swamp all the
other pvops operations, even though I can't imagine that they're
nearly as common (there's only a .05% increase in instructions
executed).
If I disable just the pv-spinlock calls, my tests show that pvops is
identical to non-pvops performance on native (my measurements show that
it is actually about .1% faster, but Xiaohui shows a .05% slowdown).
Summary of results, averaging 10 runs of the "mmperf" test, using a
no-pvops build as baseline:
nopv Pv-nospin Pv-spin
CPU cycles 100.00% 99.89% 102.18%
instructions 100.00% 100.10% 100.15%
CPI 100.00% 99.79% 102.03%
cache ref 100.00% 100.84% 100.28%
cache miss 100.00% 90.47% 88.56%
cache miss rate 100.00% 89.72% 88.31%
branches 100.00% 99.93% 100.04%
branch miss 100.00% 103.66% 107.72%
branch miss rt 100.00% 103.73% 107.67%
wallclock 100.00% 99.90% 102.20%
The clear effect here is that the 2% increase in CPI is
directly reflected in the final wallclock time.
(The other interesting effect is that the more ops are
out of line calls via pvops, the lower the cache access
and miss rates. Not too surprising, but it suggests that
the non-pvops kernel is over-inlined. On the flipside,
the branch misses go up correspondingly...)
So, what's the fix?
Paravirt patching turns all the pvops calls into direct calls, so
_spin_lock etc do end up having direct calls. For example, the compiler
generated code for paravirtualized _spin_lock is:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq *0xffffffff805a5b30
<_spin_lock+22>: retq
The indirect call will get patched to:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq <__ticket_spin_lock>
<_spin_lock+20>: nop; nop /* or whatever 2-byte nop */
<_spin_lock+22>: retq
One possibility is to inline _spin_lock, etc, when building an
optimised kernel (ie, when there's no spinlock/preempt
instrumentation/debugging enabled). That will remove the outer
call/return pair, returning the instruction stream to a single
call/return, which will presumably execute the same as the non-pvops
case. The downsides arel 1) it will replicate the
preempt_disable/enable code at eack lock/unlock callsite; this code is
fairly small, but not nothing; and 2) the spinlock definitions are
already a very heavily tangled mass of #ifdefs and other preprocessor
magic, and making any changes will be non-trivial.
The other obvious answer is to disable pv-spinlocks. Making them a
separate config option is fairly easy, and it would be trivial to
enable them only when Xen is enabled (as the only non-default user).
But it doesn't really address the common case of a distro build which
is going to have Xen support enabled, and leaves the open question of
whether the native performance cost of pv-spinlocks is worth the
performance improvement on a loaded Xen system (10% saving of overall
system CPU when guests block rather than spin). Still it is a
reasonable short-term workaround.
[ Impact: fix pvops performance regression when running native ]
Analysed-by: "Xin Xiaohui" <xiaohui.xin@intel.com>
Analysed-by: "Li Xin" <xin.li@intel.com>
Analysed-by: "Nakajima Jun" <jun.nakajima@intel.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Xen-devel <xen-devel@lists.xensource.com>
LKML-Reference: <4A0B62F7.5030802@goop.org>
[ fixed the help text ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-13 17:16:55 -07:00
|
|
|
|
|
|
|
|
|
2012-10-02 11:16:47 -07:00
|
|
|
|
x86: Fix performance regression caused by paravirt_ops on native kernels
Xiaohui Xin and some other folks at Intel have been looking into what's
behind the performance hit of paravirt_ops when running native.
It appears that the hit is entirely due to the paravirtualized
spinlocks introduced by:
| commit 8efcbab674de2bee45a2e4cdf97de16b8e609ac8
| Date: Mon Jul 7 12:07:51 2008 -0700
|
| paravirt: introduce a "lock-byte" spinlock implementation
The extra call/return in the spinlock path is somehow
causing an increase in the cycles/instruction of somewhere around 2-7%
(seems to vary quite a lot from test to test). The working theory is
that the CPU's pipeline is getting upset about the
call->call->locked-op->return->return, and seems to be failing to
speculate (though I haven't seen anything definitive about the precise
reasons). This doesn't entirely make sense, because the performance
hit is also visible on unlock and other operations which don't involve
locked instructions. But spinlock operations clearly swamp all the
other pvops operations, even though I can't imagine that they're
nearly as common (there's only a .05% increase in instructions
executed).
If I disable just the pv-spinlock calls, my tests show that pvops is
identical to non-pvops performance on native (my measurements show that
it is actually about .1% faster, but Xiaohui shows a .05% slowdown).
Summary of results, averaging 10 runs of the "mmperf" test, using a
no-pvops build as baseline:
nopv Pv-nospin Pv-spin
CPU cycles 100.00% 99.89% 102.18%
instructions 100.00% 100.10% 100.15%
CPI 100.00% 99.79% 102.03%
cache ref 100.00% 100.84% 100.28%
cache miss 100.00% 90.47% 88.56%
cache miss rate 100.00% 89.72% 88.31%
branches 100.00% 99.93% 100.04%
branch miss 100.00% 103.66% 107.72%
branch miss rt 100.00% 103.73% 107.67%
wallclock 100.00% 99.90% 102.20%
The clear effect here is that the 2% increase in CPI is
directly reflected in the final wallclock time.
(The other interesting effect is that the more ops are
out of line calls via pvops, the lower the cache access
and miss rates. Not too surprising, but it suggests that
the non-pvops kernel is over-inlined. On the flipside,
the branch misses go up correspondingly...)
So, what's the fix?
Paravirt patching turns all the pvops calls into direct calls, so
_spin_lock etc do end up having direct calls. For example, the compiler
generated code for paravirtualized _spin_lock is:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq *0xffffffff805a5b30
<_spin_lock+22>: retq
The indirect call will get patched to:
<_spin_lock+0>: mov %gs:0xb4c8,%rax
<_spin_lock+9>: incl 0xffffffffffffe044(%rax)
<_spin_lock+15>: callq <__ticket_spin_lock>
<_spin_lock+20>: nop; nop /* or whatever 2-byte nop */
<_spin_lock+22>: retq
One possibility is to inline _spin_lock, etc, when building an
optimised kernel (ie, when there's no spinlock/preempt
instrumentation/debugging enabled). That will remove the outer
call/return pair, returning the instruction stream to a single
call/return, which will presumably execute the same as the non-pvops
case. The downsides arel 1) it will replicate the
preempt_disable/enable code at eack lock/unlock callsite; this code is
fairly small, but not nothing; and 2) the spinlock definitions are
already a very heavily tangled mass of #ifdefs and other preprocessor
magic, and making any changes will be non-trivial.
The other obvious answer is to disable pv-spinlocks. Making them a
separate config option is fairly easy, and it would be trivial to
enable them only when Xen is enabled (as the only non-default user).
But it doesn't really address the common case of a distro build which
is going to have Xen support enabled, and leaves the open question of
whether the native performance cost of pv-spinlocks is worth the
performance improvement on a loaded Xen system (10% saving of overall
system CPU when guests block rather than spin). Still it is a
reasonable short-term workaround.
[ Impact: fix pvops performance regression when running native ]
Analysed-by: "Xin Xiaohui" <xiaohui.xin@intel.com>
Analysed-by: "Li Xin" <xin.li@intel.com>
Analysed-by: "Nakajima Jun" <jun.nakajima@intel.com>
Signed-off-by: Jeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Cc: Nick Piggin <npiggin@suse.de>
Cc: Xen-devel <xen-devel@lists.xensource.com>
LKML-Reference: <4A0B62F7.5030802@goop.org>
[ fixed the help text ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2009-05-13 17:16:55 -07:00
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2008-06-03 16:17:29 +02:00
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2007-11-09 21:56:54 +01:00
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2008-06-25 00:19:14 -04:00
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2009-02-05 16:21:53 +01:00
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2008-06-25 00:19:14 -04:00
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2010-02-10 01:20:20 -08:00
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2010-08-25 13:39:18 -07:00
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2010-02-10 01:20:20 -08:00
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2008-04-18 17:49:15 -07:00
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2009-02-05 16:21:53 +01:00
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2008-03-21 18:56:19 -07:00
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2008-04-18 17:49:15 -07:00
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2009-02-05 16:21:53 +01:00
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2008-07-15 14:48:48 +02:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2009-01-27 18:43:09 +01:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2011-10-29 00:48:42 +02:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2008-02-06 01:38:52 -08:00
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2007-11-09 21:56:54 +01:00
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2009-09-02 07:37:17 -07:00
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2011-12-17 17:43:40 +00:00
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2011-06-06 12:43:07 +01:00
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2011-12-17 21:57:25 +00:00
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2009-09-02 07:37:17 -07:00
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2011-01-20 14:44:16 -08:00
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2007-11-09 21:56:54 +01:00
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2008-04-28 02:14:14 -07:00
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2011-01-20 14:44:16 -08:00
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2009-02-05 16:21:53 +01:00
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2008-04-28 02:14:14 -07:00
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2007-11-09 21:56:54 +01:00
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2011-01-20 14:44:16 -08:00
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2007-11-09 21:56:54 +01:00
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2010-09-17 18:03:43 +02:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2012-10-02 11:16:47 -07:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-11-18 12:44:21 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2012-09-02 17:38:20 -07:00
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2007-11-09 21:56:54 +01:00
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2008-04-29 00:59:36 -07:00
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2012-09-10 12:41:45 +01:00
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2008-08-25 14:15:38 -07:00
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2008-05-12 21:21:12 +02:00
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2010-08-21 21:32:41 +02:00
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2012-10-02 11:16:47 -07:00
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2008-12-16 17:33:51 -08:00
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2009-02-05 16:21:53 +01:00
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2010-08-21 21:32:41 +02:00
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2008-05-12 21:21:12 +02:00
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2007-11-09 21:56:54 +01:00
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2008-12-16 17:33:51 -08:00
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2009-04-21 21:44:48 -04:00
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2008-12-16 17:33:51 -08:00
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2008-12-16 17:34:00 -08:00
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2008-08-25 14:15:38 -07:00
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2008-12-16 17:34:00 -08:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-08-25 14:15:38 -07:00
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2007-11-09 21:56:54 +01:00
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2008-02-27 13:16:30 -08:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2008-02-27 13:16:30 -08:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2009-01-27 18:43:09 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2009-01-27 18:43:09 +01:00
|
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
|
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|
2011-02-22 15:38:07 +01:00
|
|
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|
2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-09 21:56:54 +01:00
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2008-07-15 13:48:55 +02:00
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2009-02-05 16:21:53 +01:00
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2008-07-15 13:48:55 +02:00
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2007-11-09 21:56:54 +01:00
|
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2009-07-09 00:31:38 +02:00
|
|
|
|
2011-09-13 15:23:21 +02:00
|
|
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|
2007-11-09 21:56:54 +01:00
|
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|
2009-07-09 00:31:38 +02:00
|
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2007-11-09 21:56:54 +01:00
|
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|
2009-07-09 00:31:38 +02:00
|
|
|
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-28 19:07:31 +02:00
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
2008-01-30 13:31:03 +01:00
|
|
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|
|
|
|
|
|
2009-07-09 00:31:41 +02:00
|
|
|
|
2009-02-05 16:21:53 +01:00
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
|
|
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|
|
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|
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|
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|
|
|
|
2008-01-30 13:31:03 +01:00
|
|
|
|
|
|
|
|
|
2009-07-09 00:31:41 +02:00
|
|
|
|
2009-02-05 16:21:53 +01:00
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-28 19:07:31 +02:00
|
|
|
|
2010-04-21 15:23:44 +01:00
|
|
|
|
2009-07-09 00:31:37 +02:00
|
|
|
|
2009-05-27 16:57:31 +09:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-28 19:07:31 +02:00
|
|
|
|
2009-02-12 13:49:31 +01:00
|
|
|
|
|
|
|
|
|
2010-04-21 15:23:44 +01:00
|
|
|
|
2009-02-12 13:49:31 +01:00
|
|
|
|
2009-04-29 19:31:00 +02:00
|
|
|
|
2009-07-09 00:31:41 +02:00
|
|
|
|
2009-04-29 19:31:00 +02:00
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-28 19:07:31 +02:00
|
|
|
|
|
|
|
|
|
2009-07-09 00:31:39 +02:00
|
|
|
|
x86, mce: use 64bit machine check code on 32bit
The 64bit machine check code is in many ways much better than
the 32bit machine check code: it is more specification compliant,
is cleaner, only has a single code base versus one per CPU,
has better infrastructure for recovery, has a cleaner way to communicate
with user space etc. etc.
Use the 64bit code for 32bit too.
This is the second attempt to do this. There was one a couple of years
ago to unify this code for 32bit and 64bit. Back then this ran into some
trouble with K7s and was reverted.
I believe this time the K7 problems (and some others) are addressed.
I went over the old handlers and was very careful to retain
all quirks.
But of course this needs a lot of testing on old systems. On newer
64bit capable systems I don't expect much problems because they have been
already tested with the 64bit kernel.
I made this a CONFIG for now that still allows to select the old
machine check code. This is mostly to make testing easier,
if someone runs into a problem we can ask them to try
with the CONFIG switched.
The new code is default y for more coverage.
Once there is confidence the 64bit code works well on older hardware
too the CONFIG_X86_OLD_MCE and the associated code can be easily
removed.
This causes a behaviour change for 32bit installations. They now
have to install the mcelog package to be able to log
corrected machine checks.
The 64bit machine check code only handles CPUs which support the
standard Intel machine check architecture described in the IA32 SDM.
The 32bit code has special support for some older CPUs which
have non standard machine check architectures, in particular
WinChip C3 and Intel P5. I made those a separate CONFIG option
and kept them for now. The WinChip variant could be probably
removed without too much pain, it doesn't really do anything
interesting. P5 is also disabled by default (like it
was before) because many motherboards have it miswired, but
according to Alan Cox a few embedded setups use that one.
Forward ported/heavily changed version of old patch, original patch
included review/fixes from Thomas Gleixner, Bert Wesarg.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2009-04-28 19:07:31 +02:00
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
2011-01-20 14:44:16 -08:00
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
|
|
|
|
|
2009-02-05 16:21:53 +01:00
|
|
|
|
|
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
2009-02-05 16:21:53 +01:00
|
|
|
|
|
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
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|
|
2011-05-25 20:43:33 +02:00
|
|
|
|
2007-11-09 21:56:54 +01:00
|
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|
|
2008-10-15 22:01:38 -07:00
|
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|
2007-11-09 21:56:54 +01:00
|
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|
2008-01-30 13:33:36 +01:00
|
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|
2007-11-09 21:56:54 +01:00
|
|
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|
|
|
|
|
2012-08-01 19:17:01 +02:00
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
|
|
|
|
|
2012-08-01 19:17:01 +02:00
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
2008-07-28 18:44:22 +02:00
|
|
|
|
2012-08-01 19:17:01 +02:00
|
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|
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|
2007-11-09 21:56:54 +01:00
|
|
|
|
2008-07-28 18:44:21 +02:00
|
|
|
|
|
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
2012-08-01 19:17:01 +02:00
|
|
|
|
|
|
|
|
|
2007-11-09 21:56:54 +01:00
|
|
|
|
2008-07-28 18:44:21 +02:00
|
|
|
|
2012-08-01 19:17:01 +02:00
|
|
|
|
2009-02-05 16:21:53 +01:00
|
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2008-07-28 18:44:21 +02:00
|
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|
2009-02-05 16:21:53 +01:00
|
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|
2008-07-28 18:44:21 +02:00
|
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|
2008-07-28 18:44:22 +02:00
|
|
|
|
2012-08-01 19:17:01 +02:00
|
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|
2009-02-05 16:21:53 +01:00
|
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2008-07-28 18:44:22 +02:00
|
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|
2009-02-05 16:21:53 +01:00
|
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|
|
2008-01-30 13:31:03 +01:00
|
|
|
|
2007-11-09 21:56:54 +01:00
|
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|
2012-12-20 23:44:32 -08:00
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2007-11-09 21:56:54 +01:00
|
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2010-04-21 15:23:44 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2012-11-28 11:50:23 -08:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2011-01-20 14:44:16 -08:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-09 21:56:54 +01:00
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2008-10-15 22:01:38 -07:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-09-11 01:31:45 -07:00
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2012-09-10 12:41:45 +01:00
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2008-09-11 01:31:45 -07:00
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2010-10-20 15:55:35 -07:00
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2012-09-10 12:41:45 +01:00
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2010-10-20 15:55:35 -07:00
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2008-10-22 12:33:16 +02:00
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2011-01-20 14:44:16 -08:00
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2008-10-22 12:33:16 +02:00
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2009-02-05 16:21:53 +01:00
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2008-10-22 12:33:16 +02:00
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2007-11-09 21:56:54 +01:00
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2008-11-05 02:27:19 +09:00
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2007-11-09 21:56:54 +01:00
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2012-10-02 11:16:47 -07:00
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2008-06-17 15:39:01 -07:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-11-05 02:27:19 +09:00
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2007-11-09 21:56:54 +01:00
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2008-11-08 13:29:45 +01:00
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2008-11-05 02:27:19 +09:00
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2007-11-09 21:56:54 +01:00
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2010-10-29 17:14:30 +02:00
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2008-01-30 13:31:03 +01:00
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2011-07-11 10:34:32 +02:00
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2009-02-05 16:21:53 +01:00
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2010-10-29 17:14:30 +02:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-03-25 10:14:35 -07:00
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2007-11-09 21:56:54 +01:00
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2011-05-02 17:24:48 +02:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-08-25 14:15:38 -07:00
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2010-03-25 15:39:27 -07:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2008-05-12 21:21:12 +02:00
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2009-01-26 11:12:25 +01:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-09 21:56:54 +01:00
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2011-04-01 11:15:12 +02:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:30:47 +01:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:30:47 +01:00
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2007-11-09 21:56:54 +01:00
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2012-10-02 11:16:47 -07:00
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2007-11-09 21:56:54 +01:00
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2011-04-01 11:15:12 +02:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:30:47 +01:00
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2007-11-09 21:56:54 +01:00
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2012-09-10 12:41:45 +01:00
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2007-11-09 21:56:54 +01:00
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2011-04-01 11:15:12 +02:00
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2010-01-10 16:28:09 +02:00
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2007-11-09 21:56:54 +01:00
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2010-04-21 15:23:44 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-09-07 01:51:34 -07:00
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2009-02-05 16:21:53 +01:00
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2008-09-07 01:51:34 -07:00
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2009-02-05 16:21:53 +01:00
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2008-09-07 01:51:34 -07:00
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2009-02-05 16:21:53 +01:00
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2008-09-07 01:51:34 -07:00
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2008-09-07 02:37:32 -07:00
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2009-02-05 16:21:53 +01:00
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2008-09-07 02:37:32 -07:00
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2009-02-05 16:21:53 +01:00
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2008-09-07 02:37:32 -07:00
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2010-08-25 16:38:20 -07:00
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2010-08-24 17:32:04 -07:00
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2009-02-05 16:21:53 +01:00
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2010-08-24 17:32:04 -07:00
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2008-09-16 10:07:34 +02:00
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2010-08-24 17:32:04 -07:00
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2008-09-16 10:07:34 +02:00
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2010-08-24 17:32:04 -07:00
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2008-09-16 10:07:34 +02:00
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2010-08-24 17:32:04 -07:00
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2008-09-16 10:07:34 +02:00
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2007-11-09 21:56:54 +01:00
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2010-04-21 15:23:44 +01:00
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2011-01-20 14:44:16 -08:00
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2007-11-09 21:56:54 +01:00
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2008-07-26 17:54:22 -07:00
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2007-11-09 21:56:54 +01:00
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2008-04-29 03:52:33 -07:00
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x86: change MTRR_SANITIZER to def_bool y
This option has been added in v2.6.26 as a default-disabled
feature and went through several revisions since then.
The feature fixes a wide range of MTRR setup problems that BIOSes
leave us with: slow system, slow Xorg, slow system when adding lots
of RAM, etc., so we want to enable it by default for v2.6.28.
See:
[Bug 10508] Upgrade to 4GB of RAM messes up MTRRs
http://bugzilla.kernel.org/show_bug.cgi?id=10508
and the test results in:
http://lkml.org/lkml/2008/9/29/273
1. hpa
reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
reg01: base=0x13c000000 (5056MB), size= 64MB: uncachable, count=1
reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg03: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
reg04: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1
reg05: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 128M num_reg: 6 lose RAM: 0M
range0: 0000000000000000 - 00000000c0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
hole: 00000000bf700000 - 00000000c0000000
Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
range0: 0000000100000000 - 0000000140000000
Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
hole: 000000013c000000 - 0000000140000000
Setting variable MTRR 5, base: 5056MB, range: 64MB, type UC
2. Dylan Taft
reg00: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg01: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
reg02: base=0x120000000 (4608MB), size= 256MB: write-back, count=1
reg03: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
reg04: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
reg05: base=0xc7e00000 (3198MB), size= 2MB: uncachable, count=1
reg06: base=0xc8000000 (3200MB), size= 128MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 4M num_reg: 6 lose RAM: 0M
range0: 0000000000000000 - 00000000c8000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
Setting variable MTRR 2, base: 3072MB, range: 128MB, type WB
hole: 00000000c7e00000 - 00000000c8000000
Setting variable MTRR 3, base: 3198MB, range: 2MB, type UC
rangeX: 0000000100000000 - 0000000130000000
Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
Setting variable MTRR 5, base: 4608MB, range: 256MB, type WB
3. Gabriel
reg00: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
reg01: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg03: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
reg04: base=0x120000000 (4608MB), size= 128MB: write-back, count=1
reg05: base=0x128000000 (4736MB), size= 64MB: write-back, count=1
reg06: base=0xcf600000 (3318MB), size= 2MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 16M num_reg: 7 lose RAM: 0M
range0: 0000000000000000 - 00000000d0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
Setting variable MTRR 2, base: 3072MB, range: 256MB, type WB
hole: 00000000cf600000 - 00000000cf800000
Setting variable MTRR 3, base: 3318MB, range: 2MB, type UC
rangeX: 0000000100000000 - 000000012c000000
Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
Setting variable MTRR 5, base: 4608MB, range: 128MB, type WB
Setting variable MTRR 6, base: 4736MB, range: 64MB, type WB
4. Mika Fischer
reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
reg01: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg02: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
reg03: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1
reg04: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 16M num_reg: 5 lose RAM: 0M
range0: 0000000000000000 - 00000000c0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
hole: 00000000bf700000 - 00000000c0000000
Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
rangeX: 0000000100000000 - 0000000140000000
Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-30 16:29:40 -07:00
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2008-04-29 03:52:33 -07:00
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2009-02-05 16:21:53 +01:00
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2008-07-15 14:48:48 +02:00
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2008-04-29 03:52:33 -07:00
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2008-07-15 14:48:48 +02:00
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2009-01-26 11:12:25 +01:00
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2008-07-15 14:48:48 +02:00
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2008-04-29 03:52:33 -07:00
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x86: change MTRR_SANITIZER to def_bool y
This option has been added in v2.6.26 as a default-disabled
feature and went through several revisions since then.
The feature fixes a wide range of MTRR setup problems that BIOSes
leave us with: slow system, slow Xorg, slow system when adding lots
of RAM, etc., so we want to enable it by default for v2.6.28.
See:
[Bug 10508] Upgrade to 4GB of RAM messes up MTRRs
http://bugzilla.kernel.org/show_bug.cgi?id=10508
and the test results in:
http://lkml.org/lkml/2008/9/29/273
1. hpa
reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
reg01: base=0x13c000000 (5056MB), size= 64MB: uncachable, count=1
reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg03: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
reg04: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1
reg05: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 128M num_reg: 6 lose RAM: 0M
range0: 0000000000000000 - 00000000c0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
hole: 00000000bf700000 - 00000000c0000000
Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
range0: 0000000100000000 - 0000000140000000
Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
hole: 000000013c000000 - 0000000140000000
Setting variable MTRR 5, base: 5056MB, range: 64MB, type UC
2. Dylan Taft
reg00: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg01: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
reg02: base=0x120000000 (4608MB), size= 256MB: write-back, count=1
reg03: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
reg04: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
reg05: base=0xc7e00000 (3198MB), size= 2MB: uncachable, count=1
reg06: base=0xc8000000 (3200MB), size= 128MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 4M num_reg: 6 lose RAM: 0M
range0: 0000000000000000 - 00000000c8000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
Setting variable MTRR 2, base: 3072MB, range: 128MB, type WB
hole: 00000000c7e00000 - 00000000c8000000
Setting variable MTRR 3, base: 3198MB, range: 2MB, type UC
rangeX: 0000000100000000 - 0000000130000000
Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
Setting variable MTRR 5, base: 4608MB, range: 256MB, type WB
3. Gabriel
reg00: base=0xd0000000 (3328MB), size= 256MB: uncachable, count=1
reg01: base=0xe0000000 (3584MB), size= 512MB: uncachable, count=1
reg02: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg03: base=0x100000000 (4096MB), size= 512MB: write-back, count=1
reg04: base=0x120000000 (4608MB), size= 128MB: write-back, count=1
reg05: base=0x128000000 (4736MB), size= 64MB: write-back, count=1
reg06: base=0xcf600000 (3318MB), size= 2MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 16M num_reg: 7 lose RAM: 0M
range0: 0000000000000000 - 00000000d0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
Setting variable MTRR 2, base: 3072MB, range: 256MB, type WB
hole: 00000000cf600000 - 00000000cf800000
Setting variable MTRR 3, base: 3318MB, range: 2MB, type UC
rangeX: 0000000100000000 - 000000012c000000
Setting variable MTRR 4, base: 4096MB, range: 512MB, type WB
Setting variable MTRR 5, base: 4608MB, range: 128MB, type WB
Setting variable MTRR 6, base: 4736MB, range: 64MB, type WB
4. Mika Fischer
reg00: base=0xc0000000 (3072MB), size=1024MB: uncachable, count=1
reg01: base=0x00000000 ( 0MB), size=4096MB: write-back, count=1
reg02: base=0x100000000 (4096MB), size=1024MB: write-back, count=1
reg03: base=0xbf700000 (3063MB), size= 1MB: uncachable, count=1
reg04: base=0xbf800000 (3064MB), size= 8MB: uncachable, count=1
will get
Found optimal setting for mtrr clean up
gran_size: 1M chunk_size: 16M num_reg: 5 lose RAM: 0M
range0: 0000000000000000 - 00000000c0000000
Setting variable MTRR 0, base: 0MB, range: 2048MB, type WB
Setting variable MTRR 1, base: 2048MB, range: 1024MB, type WB
hole: 00000000bf700000 - 00000000c0000000
Setting variable MTRR 2, base: 3063MB, range: 1MB, type UC
Setting variable MTRR 3, base: 3064MB, range: 8MB, type UC
rangeX: 0000000100000000 - 0000000140000000
Setting variable MTRR 4, base: 4096MB, range: 1024MB, type WB
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-09-30 16:29:40 -07:00
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2008-04-29 03:52:33 -07:00
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2008-04-29 20:25:58 -07:00
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2008-04-29 03:52:33 -07:00
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2009-02-05 16:21:53 +01:00
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2008-04-29 20:25:58 -07:00
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2008-04-29 03:52:33 -07:00
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2008-05-02 02:40:22 -07:00
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2009-02-05 16:21:53 +01:00
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2008-05-02 02:40:22 -07:00
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2008-07-15 14:48:48 +02:00
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2008-05-02 02:40:22 -07:00
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2008-03-18 17:00:14 -07:00
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2010-04-21 15:23:44 +01:00
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2011-01-20 14:44:16 -08:00
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2008-04-26 10:26:52 +02:00
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2009-02-05 16:21:53 +01:00
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2008-03-18 17:00:14 -07:00
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2008-03-24 14:22:35 -07:00
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2008-03-18 17:00:14 -07:00
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2008-03-24 14:22:35 -07:00
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2008-03-18 17:00:14 -07:00
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2009-07-10 09:57:37 -07:00
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x86, random: Architectural inlines to get random integers with RDRAND
Architectural inlines to get random ints and longs using the RDRAND
instruction.
Intel has introduced a new RDRAND instruction, a Digital Random Number
Generator (DRNG), which is functionally an high bandwidth entropy
source, cryptographic whitener, and integrity monitor all built into
hardware. This enables RDRAND to be used directly, bypassing the
kernel random number pool.
For technical documentation, see:
http://software.intel.com/en-us/articles/download-the-latest-bull-mountain-software-implementation-guide/
In this patch, this is *only* used for the nonblocking random number
pool. RDRAND is a nonblocking source, similar to our /dev/urandom,
and is therefore not a direct replacement for /dev/random. The
architectural hooks presented in the previous patch only feed the
kernel internal users, which only use the nonblocking pool, and so
this is not a problem.
Since this instruction is available in userspace, there is no reason
to have a /dev/hw_rng device driver for the purpose of feeding rngd.
This is especially so since RDRAND is a nonblocking source, and needs
additional whitening and reduction (see the above technical
documentation for details) in order to be of "pure entropy source"
quality.
The CONFIG_EXPERT compile-time option can be used to disable this use
of RDRAND.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Originally-by: Fenghua Yu <fenghua.yu@intel.com>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "Theodore Ts'o" <tytso@mit.edu>
2011-07-31 13:59:29 -07:00
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2012-09-21 12:43:10 -07:00
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2007-11-09 21:56:54 +01:00
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2008-10-15 22:01:38 -07:00
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2008-01-30 13:31:19 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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x86, efi: EFI boot stub support
There is currently a large divide between kernel development and the
development of EFI boot loaders. The idea behind this patch is to give
the kernel developers full control over the EFI boot process. As
H. Peter Anvin put it,
"The 'kernel carries its own stub' approach been very successful in
dealing with BIOS, and would make a lot of sense to me for EFI as
well."
This patch introduces an EFI boot stub that allows an x86 bzImage to
be loaded and executed by EFI firmware. The bzImage appears to the
firmware as an EFI application. Luckily there are enough free bits
within the bzImage header so that it can masquerade as an EFI
application, thereby coercing the EFI firmware into loading it and
jumping to its entry point. The beauty of this masquerading approach
is that both BIOS and EFI boot loaders can still load and run the same
bzImage, thereby allowing a single kernel image to work in any boot
environment.
The EFI boot stub supports multiple initrds, but they must exist on
the same partition as the bzImage. Command-line arguments for the
kernel can be appended after the bzImage name when run from the EFI
shell, e.g.
Shell> bzImage console=ttyS0 root=/dev/sdb initrd=initrd.img
v7:
- Fix checkpatch warnings.
v6:
- Try to allocate initrd memory just below hdr->inird_addr_max.
v5:
- load_options_size is UTF-16, which needs dividing by 2 to convert
to the corresponding ASCII size.
v4:
- Don't read more than image->load_options_size
v3:
- Fix following warnings when compiling CONFIG_EFI_STUB=n
arch/x86/boot/tools/build.c: In function ‘main’:
arch/x86/boot/tools/build.c:138:24: warning: unused variable ‘pe_header’
arch/x86/boot/tools/build.c:138:15: warning: unused variable ‘file_sz’
- As reported by Matthew Garrett, some Apple machines have GOPs that
don't have hardware attached. We need to weed these out by
searching for ones that handle the PCIIO protocol.
- Don't allocate memory if no initrds are on cmdline
- Don't trust image->load_options_size
Maarten Lankhorst noted:
- Don't strip first argument when booted from efibootmgr
- Don't allocate too much memory for cmdline
- Don't update cmdline_size, the kernel considers it read-only
- Don't accept '\n' for initrd names
v2:
- File alignment was too large, was 8192 should be 512. Reported by
Maarten Lankhorst on LKML.
- Added UGA support for graphics
- Use VIDEO_TYPE_EFI instead of hard-coded number.
- Move linelength assignment until after we've assigned depth
- Dynamically fill out AddressOfEntryPoint in tools/build.c
- Don't use magic number for GDT/TSS stuff. Requested by Andi Kleen
- The bzImage may need to be relocated as it may have been loaded at
a high address address by the firmware. This was required to get my
macbook booting because the firmware loaded it at 0x7cxxxxxx, which
triggers this error in decompress_kernel(),
if (heap > ((-__PAGE_OFFSET-(128<<20)-1) & 0x7fffffff))
error("Destination address too large");
Cc: Mike Waychison <mikew@google.com>
Cc: Matthew Garrett <mjg@redhat.com>
Tested-by: Henrik Rydberg <rydberg@euromail.se>
Signed-off-by: Matt Fleming <matt.fleming@intel.com>
Link: http://lkml.kernel.org/r/1321383097.2657.9.camel@mfleming-mobl1.ger.corp.intel.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2011-12-12 21:27:52 +00:00
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2012-03-16 12:03:13 +00:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-09-09 11:01:31 +04:00
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2007-11-09 21:56:54 +01:00
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2012-07-06 16:08:25 +02:00
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2009-02-05 16:21:53 +01:00
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2008-02-14 10:36:03 +01:00
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2007-11-09 21:56:54 +01:00
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2008-02-14 10:36:03 +01:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-08-14 17:16:50 +02:00
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2007-11-09 21:56:54 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-07-25 19:45:07 -07:00
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2012-10-02 11:16:47 -07:00
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2009-03-10 10:57:16 +08:00
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2009-02-05 16:21:53 +01:00
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kexec jump: save/restore device state
This patch implements devices state save/restore before after kexec.
This patch together with features in kexec_jump patch can be used for
following:
- A simple hibernation implementation without ACPI support. You can kexec a
hibernating kernel, save the memory image of original system and shutdown
the system. When resuming, you restore the memory image of original system
via ordinary kexec load then jump back.
- Kernel/system debug through making system snapshot. You can make system
snapshot, jump back, do some thing and make another system snapshot.
- Cooperative multi-kernel/system. With kexec jump, you can switch between
several kernels/systems quickly without boot process except the first time.
This appears like swap a whole kernel/system out/in.
- A general method to call program in physical mode (paging turning
off). This can be used to invoke BIOS code under Linux.
The following user-space tools can be used with kexec jump:
- kexec-tools needs to be patched to support kexec jump. The patches
and the precompiled kexec can be download from the following URL:
source: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec-tools-src_git_kh10.tar.bz2
patches: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec-tools-patches_git_kh10.tar.bz2
binary: http://khibernation.sourceforge.net/download/release_v10/kexec-tools/kexec_git_kh10
- makedumpfile with patches are used as memory image saving tool, it
can exclude free pages from original kernel memory image file. The
patches and the precompiled makedumpfile can be download from the
following URL:
source: http://khibernation.sourceforge.net/download/release_v10/makedumpfile/makedumpfile-src_cvs_kh10.tar.bz2
patches: http://khibernation.sourceforge.net/download/release_v10/makedumpfile/makedumpfile-patches_cvs_kh10.tar.bz2
binary: http://khibernation.sourceforge.net/download/release_v10/makedumpfile/makedumpfile_cvs_kh10
- An initramfs image can be used as the root file system of kexeced
kernel. An initramfs image built with "BuildRoot" can be downloaded
from the following URL:
initramfs image: http://khibernation.sourceforge.net/download/release_v10/initramfs/rootfs_cvs_kh10.gz
All user space tools above are included in the initramfs image.
Usage example of simple hibernation:
1. Compile and install patched kernel with following options selected:
CONFIG_X86_32=y
CONFIG_RELOCATABLE=y
CONFIG_KEXEC=y
CONFIG_CRASH_DUMP=y
CONFIG_PM=y
CONFIG_HIBERNATION=y
CONFIG_KEXEC_JUMP=y
2. Build an initramfs image contains kexec-tool and makedumpfile, or
download the pre-built initramfs image, called rootfs.gz in
following text.
3. Prepare a partition to save memory image of original kernel, called
hibernating partition in following text.
4. Boot kernel compiled in step 1 (kernel A).
5. In the kernel A, load kernel compiled in step 1 (kernel B) with
/sbin/kexec. The shell command line can be as follow:
/sbin/kexec --load-preserve-context /boot/bzImage --mem-min=0x100000
--mem-max=0xffffff --initrd=rootfs.gz
6. Boot the kernel B with following shell command line:
/sbin/kexec -e
7. The kernel B will boot as normal kexec. In kernel B the memory
image of kernel A can be saved into hibernating partition as
follow:
jump_back_entry=`cat /proc/cmdline | tr ' ' '\n' | grep kexec_jump_back_entry | cut -d '='`
echo $jump_back_entry > kexec_jump_back_entry
cp /proc/vmcore dump.elf
Then you can shutdown the machine as normal.
8. Boot kernel compiled in step 1 (kernel C). Use the rootfs.gz as
root file system.
9. In kernel C, load the memory image of kernel A as follow:
/sbin/kexec -l --args-none --entry=`cat kexec_jump_back_entry` dump.elf
10. Jump back to the kernel A as follow:
/sbin/kexec -e
Then, kernel A is resumed.
Implementation point:
To support jumping between two kernels, before jumping to (executing)
the new kernel and jumping back to the original kernel, the devices
are put into quiescent state, and the state of devices and CPU is
saved. After jumping back from kexeced kernel and jumping to the new
kernel, the state of devices and CPU are restored accordingly. The
devices/CPU state save/restore code of software suspend is called to
implement corresponding function.
Known issues:
- Because the segment number supported by sys_kexec_load is limited,
hibernation image with many segments may not be load. This is
planned to be eliminated by adding a new flag to sys_kexec_load to
make a image can be loaded with multiple sys_kexec_load invoking.
Now, only the i386 architecture is supported.
Signed-off-by: Huang Ying <ying.huang@intel.com>
Acked-by: Vivek Goyal <vgoyal@redhat.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Nigel Cunningham <nigel@nigel.suspend2.net>
Cc: "Rafael J. Wysocki" <rjw@sisk.pl>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-07-25 19:45:10 -07:00
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2008-07-25 19:45:07 -07:00
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2007-11-09 21:56:54 +01:00
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2011-01-20 14:44:16 -08:00
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2009-05-11 16:12:16 -07:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2009-05-11 16:12:16 -07:00
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2007-11-09 21:56:54 +01:00
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2009-05-07 14:19:34 -07:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2009-05-05 21:20:51 -07:00
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2007-11-09 21:56:54 +01:00
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2010-04-21 15:23:44 +01:00
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2009-05-11 16:12:16 -07:00
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2009-02-05 16:21:53 +01:00
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2007-11-09 21:56:54 +01:00
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2008-08-11 10:46:46 -05:00
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2009-01-27 17:47:24 +01:00
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2007-11-09 21:56:54 +01:00
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2008-08-11 10:46:46 -05:00
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2007-11-09 21:56:54 +01:00
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2012-11-13 11:32:39 -08:00
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2013-01-22 13:01:19 -08:00
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2012-11-13 11:32:39 -08:00
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2012-11-13 11:32:51 -08:00
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2013-01-22 13:01:19 -08:00
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2012-11-13 11:32:51 -08:00
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2007-11-09 21:56:54 +01:00
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2008-01-30 13:31:03 +01:00
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2008-01-30 13:30:43 +01:00
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2009-02-05 16:21:53 +01:00
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2008-01-30 13:30:43 +01:00
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2009-11-10 15:46:52 -08:00
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2007-11-09 21:56:54 +01:00
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2008-08-12 12:52:36 -07:00
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2009-02-05 16:21:53 +01:00
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2008-08-12 12:52:36 -07:00
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2009-02-05 16:21:53 +01:00
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2008-08-12 12:52:36 -07:00
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2009-02-05 16:21:53 +01:00
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2008-08-12 12:52:36 -07:00
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2007-11-09 21:56:54 +01:00
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2008-10-31 10:52:03 -07:00
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2010-05-26 14:44:58 -07:00
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2011-01-23 14:37:40 +01:00
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2010-05-26 14:44:58 -07:00
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2008-11-05 13:37:27 -06:00
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2007-11-06 20:41:05 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-06 20:41:05 +01:00
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2009-08-14 15:23:29 -04:00
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2008-01-30 13:32:49 +01:00
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2010-04-21 15:23:44 +01:00
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2011-11-17 11:41:31 +01:00
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2008-01-30 13:32:49 +01:00
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2007-11-06 20:41:05 +01:00
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2008-07-10 16:09:50 +02:00
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2007-11-06 20:41:05 +01:00
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2011-07-08 21:11:16 +00:00
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2007-11-06 20:41:05 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-06 20:41:05 +01:00
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2013-02-09 21:10:04 -05:00
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2007-11-06 20:41:05 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-06 20:41:05 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-06 20:41:05 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-06 20:41:05 +01:00
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2011-05-19 18:51:07 -04:00
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2007-11-06 20:41:05 +01:00
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2008-10-09 11:45:22 -07:00
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2007-11-06 20:41:05 +01:00
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2008-05-19 14:10:14 +02:00
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2008-01-30 13:32:32 +01:00
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2007-11-06 20:41:05 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-06 20:41:05 +01:00
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2008-07-10 16:09:50 +02:00
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2007-11-06 20:41:05 +01:00
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2008-04-29 00:59:53 -07:00
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2010-09-23 17:28:04 +01:00
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2008-04-29 00:59:53 -07:00
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2008-06-05 14:14:41 -07:00
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2007-11-06 20:41:05 +01:00
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2008-01-30 13:31:03 +01:00
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2008-07-10 16:09:50 +02:00
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2007-11-06 20:41:05 +01:00
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2008-01-30 13:31:03 +01:00
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2011-05-27 14:59:39 +08:00
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2007-11-06 20:41:05 +01:00
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2008-01-30 13:31:03 +01:00
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2009-08-14 15:37:50 -04:00
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2007-11-06 20:41:05 +01:00
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2008-04-29 00:59:53 -07:00
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2008-06-05 14:14:41 -07:00
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2008-04-29 00:59:53 -07:00
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2010-03-18 16:31:34 -04:00
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2007-11-06 20:41:05 +01:00
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2008-01-30 13:31:03 +01:00
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2007-11-06 20:41:05 +01:00
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2010-04-01 11:43:30 -07:00
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2011-01-20 14:44:16 -08:00
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2012-10-02 11:16:47 -07:00
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2010-04-01 11:43:30 -07:00
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2011-01-06 10:12:30 -07:00
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2007-11-06 20:41:05 +01:00
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2011-03-22 16:34:59 -07:00
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2007-11-06 20:41:05 +01:00
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2011-03-22 16:34:59 -07:00
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2007-11-06 20:41:05 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-06 20:41:05 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-06 20:41:05 +01:00
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2010-07-13 17:56:20 -07:00
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2007-11-06 20:41:05 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-06 20:41:05 +01:00
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2008-04-29 00:59:53 -07:00
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2011-02-23 09:50:15 +01:00
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2009-12-14 18:00:36 -08:00
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2011-02-23 10:08:31 +01:00
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2011-03-13 15:10:17 +00:00
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2011-12-16 15:50:17 -07:00
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2009-02-05 16:21:53 +01:00
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2008-04-29 00:59:53 -07:00
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2011-06-25 17:34:10 +01:00
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2011-06-25 17:34:11 +01:00
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2011-06-25 17:34:10 +01:00
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2010-10-10 10:40:32 +01:00
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2011-06-25 17:34:11 +01:00
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2010-10-10 10:40:32 +01:00
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2011-06-25 17:34:17 +01:00
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2011-06-25 17:34:12 +01:00
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2011-07-24 18:33:21 +01:00
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2012-12-18 12:22:17 -08:00
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2011-07-24 18:33:21 +01:00
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2011-06-25 17:34:12 +01:00
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2011-06-25 17:34:14 +01:00
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2011-06-25 17:34:12 +01:00
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2011-06-25 17:34:14 +01:00
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2011-06-25 17:34:15 +01:00
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2011-06-25 17:34:16 +01:00
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2011-06-25 17:34:12 +01:00
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2011-06-25 17:34:18 +01:00
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2011-07-24 18:33:21 +01:00
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2011-06-25 17:34:18 +01:00
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2010-10-10 10:40:32 +01:00
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2011-09-20 14:00:12 -07:00
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2012-03-05 15:05:15 -08:00
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2012-01-14 01:45:39 -07:00
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2013-01-04 16:18:14 -05:00
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2007-11-06 20:41:05 +01:00
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2010-09-17 18:03:43 +02:00
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2007-11-06 23:10:39 +01:00
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2010-03-12 15:43:03 +01:00
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2007-11-06 23:10:39 +01:00
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2007-11-06 20:41:05 +01:00
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2011-03-23 16:43:03 -07:00
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2007-11-06 20:41:05 +01:00
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2008-01-30 13:31:55 +01:00
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2012-10-08 16:28:08 -07:00
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2009-02-05 16:21:53 +01:00
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2012-02-19 10:40:03 -08:00
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2007-11-06 20:41:05 +01:00
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2009-02-05 16:21:53 +01:00
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2007-11-06 20:41:05 +01:00
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2012-02-27 14:09:10 -08:00
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2012-10-02 11:16:47 -07:00
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2012-02-19 10:40:03 -08:00
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2007-11-06 20:41:05 +01:00
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2008-01-30 13:31:03 +01:00
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2012-02-27 14:09:10 -08:00
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[PATCH v3] ipc: provide generic compat versions of IPC syscalls
When using the "compat" APIs, architectures will generally want to
be able to make direct syscalls to msgsnd(), shmctl(), etc., and
in the kernel we would want them to be handled directly by
compat_sys_xxx() functions, as is true for other compat syscalls.
However, for historical reasons, several of the existing compat IPC
syscalls do not do this. semctl() expects a pointer to the fourth
argument, instead of the fourth argument itself. msgsnd(), msgrcv()
and shmat() expect arguments in different order.
This change adds an ARCH_WANT_OLD_COMPAT_IPC config option that can be
set to preserve this behavior for ports that use it (x86, sparc, powerpc,
s390, and mips). No actual semantics are changed for those architectures,
and there is only a minimal amount of code refactoring in ipc/compat.c.
Newer architectures like tile (and perhaps future architectures such
as arm64 and unicore64) should not select this option, and thus can
avoid having any IPC-specific code at all in their architecture-specific
compat layer. In the same vein, if this option is not selected, IPC_64
mode is assumed, since that's what the <asm-generic> headers expect.
The workaround code in "tile" for msgsnd() and msgrcv() is removed
with this change; it also fixes the bug that shmat() and semctl() were
not being properly handled.
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2012-03-15 13:13:38 -04:00
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2007-11-06 20:41:05 +01:00
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2012-09-10 12:41:45 +01:00
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2007-11-06 20:41:05 +01:00
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2012-09-10 12:41:45 +01:00
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2007-11-06 20:41:05 +01:00
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2008-01-30 13:31:03 +01:00
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2012-09-10 12:41:45 +01:00
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2007-11-06 20:41:05 +01:00
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2011-03-07 15:06:20 +00:00
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2012-09-10 12:41:45 +01:00
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2011-03-07 15:06:20 +00:00
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2007-11-06 20:41:05 +01:00
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2008-11-03 18:21:45 +01:00
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2010-10-14 12:10:42 +09:00
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2012-04-04 19:39:58 +02:00
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2012-04-04 19:40:21 +02:00
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2012-04-04 19:39:58 +02:00
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2012-04-04 19:40:10 +02:00
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2012-04-04 19:40:21 +02:00
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2012-04-04 19:40:10 +02:00
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2007-11-06 20:41:05 +01:00
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2007-12-16 11:02:48 +02:00
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2007-11-06 20:41:05 +01:00
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