2005-04-16 15:20:36 -07:00
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2006-03-27 01:16:35 -08:00
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2007-02-09 17:08:58 +00:00
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2005-04-16 15:20:36 -07:00
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2006-02-08 21:09:07 +00:00
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2005-04-16 15:20:36 -07:00
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2006-02-08 21:09:07 +00:00
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2005-04-16 15:20:36 -07:00
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2007-02-09 17:08:58 +00:00
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2007-03-05 00:30:18 -08:00
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2006-09-22 00:16:30 +01:00
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2005-04-16 15:20:36 -07:00
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2007-02-11 15:41:31 +00:00
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2005-04-16 15:20:36 -07:00
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2006-07-01 22:30:09 +01:00
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2006-08-27 12:07:02 +01:00
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2006-07-01 22:30:09 +01:00
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2005-04-16 15:20:36 -07:00
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2006-12-08 02:37:49 -08:00
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2006-03-26 01:39:19 -08:00
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2005-04-16 15:20:36 -07:00
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2005-09-06 01:48:42 +01:00
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2007-02-10 01:43:14 -08:00
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2005-04-16 15:20:36 -07:00
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2005-12-19 16:27:59 -05:00
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2006-03-27 15:18:50 +01:00
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2006-09-28 21:46:34 +09:00
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2006-03-27 15:18:50 +01:00
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2005-04-16 15:20:36 -07:00
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2006-03-07 14:42:27 +00:00
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2005-04-16 15:20:36 -07:00
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2006-06-20 21:30:44 +01:00
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2006-06-29 16:06:33 +01:00
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2007-03-05 00:30:18 -08:00
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2006-06-20 21:30:44 +01:00
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2006-06-29 16:06:33 +01:00
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2006-06-20 21:30:44 +01:00
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2005-04-16 15:20:36 -07:00
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2006-06-20 21:30:44 +01:00
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2005-04-16 15:20:36 -07:00
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2005-05-05 14:49:01 +01:00
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2007-02-26 21:07:30 +00:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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2006-06-20 21:30:44 +01:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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2005-05-05 14:49:01 +01:00
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2007-03-03 11:54:19 +00:00
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2005-04-16 15:20:36 -07:00
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2006-02-08 21:09:07 +00:00
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2005-04-16 15:20:36 -07:00
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[ARM] 3369/1: ep93xx: add core cirrus ep93xx support
Patch from Lennert Buytenhek
This patch adds support for the Cirrus ep93xx series of CPUs. The
ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs,
IrDA, MaverickCrunch floating point coprocessor, between 24 and 64
GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster
engine, graphics accelerator, IDE controller and a bunch of other
stuff.
This patch adds the core ep93xx support code, and support for the
Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-20 17:10:13 +00:00
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2005-04-16 15:20:36 -07:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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2006-06-20 21:30:44 +01:00
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2006-02-08 21:09:05 +00:00
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2006-06-20 21:30:44 +01:00
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2005-04-16 15:20:36 -07:00
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2006-09-18 23:10:26 +01:00
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2006-06-28 12:52:41 +01:00
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2006-09-18 23:12:53 +01:00
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2005-05-05 14:49:01 +01:00
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2006-02-08 21:09:05 +00:00
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2006-09-18 23:10:26 +01:00
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2006-09-18 23:12:53 +01:00
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2006-09-18 23:10:26 +01:00
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2005-04-16 15:20:36 -07:00
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2006-12-07 02:59:39 +01:00
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2007-02-13 17:12:04 +01:00
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2006-12-07 02:59:39 +01:00
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2005-04-16 15:20:36 -07:00
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2006-06-28 12:52:41 +01:00
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2006-09-22 00:58:57 +01:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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2006-06-28 12:52:41 +01:00
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2005-05-05 14:49:01 +01:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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[ARM] 3388/1: ixp23xx: add core ixp23xx support
Patch from Lennert Buytenhek
This patch adds support for the Intel ixp23xx series of CPUs. The
ixp23xx is an XSC3 based CPU with 512K of L2 cache, a 64bit 66MHz PCI
interface, two DDR RAM interfaces, QDR RAM interfaces, two gigabit
MACs, two 10/100 MACs, expansion bus, four microengines, a Media and
Switch Fabric unit almost identical to the one on the ixp2400, two
xscale (8250ish) UARTs and a bunch of other stuff.
This patch adds the core ixp23xx support code, and support for the
ADI Engineering Roadrunner, Intel IXDP2351, and IP Fabrics Double
Espresso platforms.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-28 21:18:54 +01:00
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2006-06-28 12:52:41 +01:00
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|
[ARM] 3388/1: ixp23xx: add core ixp23xx support
Patch from Lennert Buytenhek
This patch adds support for the Intel ixp23xx series of CPUs. The
ixp23xx is an XSC3 based CPU with 512K of L2 cache, a 64bit 66MHz PCI
interface, two DDR RAM interfaces, QDR RAM interfaces, two gigabit
MACs, two 10/100 MACs, expansion bus, four microengines, a Media and
Switch Fabric unit almost identical to the one on the ixp2400, two
xscale (8250ish) UARTs and a bunch of other stuff.
This patch adds the core ixp23xx support code, and support for the
ADI Engineering Roadrunner, Intel IXDP2351, and IP Fabrics Double
Espresso platforms.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-28 21:18:54 +01:00
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2005-04-16 15:20:36 -07:00
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2007-02-16 15:36:55 +01:00
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2006-06-20 21:30:44 +01:00
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2005-04-16 15:20:36 -07:00
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2006-06-28 12:52:41 +01:00
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2005-12-19 16:27:59 -05:00
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2007-03-05 00:30:18 -08:00
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2007-02-05 22:37:07 +01:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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2005-09-06 01:48:42 +01:00
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2006-01-04 15:44:16 +00:00
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2007-02-11 15:41:31 +00:00
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2005-04-16 15:20:36 -07:00
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2005-05-05 14:49:01 +01:00
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2005-06-25 19:29:34 +01:00
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2005-12-19 16:27:59 -05:00
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2007-03-05 00:30:18 -08:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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2007-02-16 12:12:31 +01:00
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2007-03-05 00:30:18 -08:00
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2005-04-16 15:20:36 -07:00
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2006-02-08 21:09:07 +00:00
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2005-04-16 15:20:36 -07:00
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2005-05-05 14:49:01 +01:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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2007-03-05 00:30:18 -08:00
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2006-02-08 21:09:05 +00:00
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2005-04-16 15:20:36 -07:00
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[ARM] 3369/1: ep93xx: add core cirrus ep93xx support
Patch from Lennert Buytenhek
This patch adds support for the Cirrus ep93xx series of CPUs. The
ep93xx is an ARM920T based CPU with two VICs, PL010 based UARTs,
IrDA, MaverickCrunch floating point coprocessor, between 24 and 64
GPIOs, ethernet, OHCI USB and, depending on the model, pcmcia, raster
engine, graphics accelerator, IDE controller and a bunch of other
stuff.
This patch adds the core ep93xx support code, and support for the
Glomation GESBC-9312-sx and the Technologic Systems TS-72xx SBCs.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-20 17:10:13 +00:00
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2005-04-16 15:20:36 -07:00
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2006-09-18 23:10:26 +01:00
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2005-04-16 15:20:36 -07:00
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2006-12-07 02:59:39 +01:00
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2005-04-16 15:20:36 -07:00
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[ARM] 3388/1: ixp23xx: add core ixp23xx support
Patch from Lennert Buytenhek
This patch adds support for the Intel ixp23xx series of CPUs. The
ixp23xx is an XSC3 based CPU with 512K of L2 cache, a 64bit 66MHz PCI
interface, two DDR RAM interfaces, QDR RAM interfaces, two gigabit
MACs, two 10/100 MACs, expansion bus, four microengines, a Media and
Switch Fabric unit almost identical to the one on the ixp2400, two
xscale (8250ish) UARTs and a bunch of other stuff.
This patch adds the core ixp23xx support code, and support for the
ADI Engineering Roadrunner, Intel IXDP2351, and IP Fabrics Double
Espresso platforms.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-28 21:18:54 +01:00
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2005-04-16 15:20:36 -07:00
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2005-07-10 19:58:17 +01:00
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2005-04-16 15:20:36 -07:00
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2005-11-10 14:26:51 +00:00
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2007-02-11 18:31:01 +01:00
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2005-04-16 15:20:36 -07:00
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2007-02-11 18:31:01 +01:00
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2007-02-16 12:12:31 +01:00
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2007-02-11 18:31:01 +01:00
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2005-04-16 15:20:36 -07:00
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2005-06-20 18:51:05 +01:00
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2005-10-31 14:25:02 +00:00
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2007-02-05 11:42:07 +01:00
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2006-01-09 17:05:41 +00:00
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2006-06-19 15:27:53 +01:00
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2007-02-16 15:36:55 +01:00
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2005-04-16 15:20:36 -07:00
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2006-09-18 23:12:53 +01:00
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2005-04-16 15:20:36 -07:00
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[ARM] 3881/4: xscale: clean up cp0/cp1 handling
XScale cores either have a DSP coprocessor (which contains a single
40 bit accumulator register), or an iWMMXt coprocessor (which contains
eight 64 bit registers.)
Because of the small amount of state in the DSP coprocessor, access to
the DSP coprocessor (CP0) is always enabled, and DSP context switching
is done unconditionally on every task switch. Access to the iWMMXt
coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is
first issued, and iWMMXt context switching is done lazily.
CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will
have iWMMXt support', but boards are supposed to select this config
symbol by hand, and at least one pxa27x board doesn't get this right,
so on that board, proc-xscale.S will incorrectly assume that we have a
DSP coprocessor, enable CP0 on boot, and we will then only save the
first iWMMXt register (wR0) on context switches, which is Bad.
This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on
might have iWMMXt support, and we will enable iWMMXt context switching
if it does.' This means that with this patch, running a CONFIG_IWMMXT=n
kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt
state over context switches, and running a CONFIG_IWMMXT=y kernel on a
non-iWMMXt capable CPU will still do DSP context save/restore.
These changes should make iWMMXt work on PXA3xx, and as a side effect,
enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such
as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined),
as well as setting and using HWCAP_IWMMXT properly.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-12-03 18:51:14 +01:00
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2007-02-17 19:05:24 +01:00
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[ARM] 3881/4: xscale: clean up cp0/cp1 handling
XScale cores either have a DSP coprocessor (which contains a single
40 bit accumulator register), or an iWMMXt coprocessor (which contains
eight 64 bit registers.)
Because of the small amount of state in the DSP coprocessor, access to
the DSP coprocessor (CP0) is always enabled, and DSP context switching
is done unconditionally on every task switch. Access to the iWMMXt
coprocessor (CP0/CP1) is enabled only when an iWMMXt instruction is
first issued, and iWMMXt context switching is done lazily.
CONFIG_IWMMXT is supposed to mean 'the cpu we will be running on will
have iWMMXt support', but boards are supposed to select this config
symbol by hand, and at least one pxa27x board doesn't get this right,
so on that board, proc-xscale.S will incorrectly assume that we have a
DSP coprocessor, enable CP0 on boot, and we will then only save the
first iWMMXt register (wR0) on context switches, which is Bad.
This patch redefines CONFIG_IWMMXT as 'the cpu we will be running on
might have iWMMXt support, and we will enable iWMMXt context switching
if it does.' This means that with this patch, running a CONFIG_IWMMXT=n
kernel on an iWMMXt-capable CPU will no longer potentially corrupt iWMMXt
state over context switches, and running a CONFIG_IWMMXT=y kernel on a
non-iWMMXt capable CPU will still do DSP context save/restore.
These changes should make iWMMXt work on PXA3xx, and as a side effect,
enable proper acc0 save/restore on non-iWMMXt capable xsc3 cores such
as IOP13xx and IXP23xx (which will not have CONFIG_CPU_XSCALE defined),
as well as setting and using HWCAP_IWMMXT properly.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-12-03 18:51:14 +01:00
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2005-04-16 15:20:36 -07:00
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2006-06-22 11:48:56 +01:00
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2005-04-16 15:20:36 -07:00
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2006-01-04 15:44:16 +00:00
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2005-04-16 15:20:36 -07:00
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2006-01-04 15:44:16 +00:00
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2005-04-16 15:20:36 -07:00
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2006-01-04 15:44:16 +00:00
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2005-05-04 05:39:22 +01:00
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2005-04-16 15:20:36 -07:00
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2006-06-25 22:12:12 +01:00
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2005-04-16 15:20:36 -07:00
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2005-11-07 21:30:21 +00:00
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2005-04-16 15:20:36 -07:00
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2005-09-10 00:26:22 -07:00
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2005-04-16 15:20:36 -07:00
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2005-11-02 22:24:33 +00:00
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2005-11-08 19:08:05 +00:00
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2005-11-09 10:50:29 +00:00
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2005-11-08 19:08:05 +00:00
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2005-04-16 15:20:36 -07:00
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2005-06-25 19:39:45 +01:00
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2005-06-28 21:01:16 +01:00
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2005-09-01 12:48:48 +01:00
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2005-06-28 21:01:16 +01:00
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2006-03-02 22:41:59 +00:00
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2006-03-04 11:01:53 +00:00
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2006-03-02 22:41:59 +00:00
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2006-01-14 16:33:50 +00:00
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2006-01-14 16:37:15 +00:00
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2006-02-08 21:09:55 +00:00
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2006-02-08 21:09:08 +00:00
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2006-01-14 16:37:15 +00:00
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2005-06-23 00:07:43 -07:00
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2005-04-16 15:20:36 -07:00
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2005-05-05 14:49:01 +01:00
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2005-04-16 15:20:36 -07:00
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2006-04-10 22:53:53 -07:00
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2005-06-23 00:07:43 -07:00
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2005-04-16 15:20:36 -07:00
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2006-01-09 17:05:41 +00:00
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2006-12-01 14:51:13 +01:00
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2005-04-16 15:20:36 -07:00
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2006-09-26 17:36:37 +09:00
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2005-04-16 15:20:36 -07:00
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2006-10-03 22:53:09 +02:00
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2005-04-16 15:20:36 -07:00
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2006-09-20 23:28:51 +01:00
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2005-04-16 15:20:36 -07:00
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2007-02-06 21:29:00 +01:00
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2005-04-16 15:20:36 -07:00
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2006-12-06 17:25:04 +01:00
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2005-04-16 15:20:36 -07:00
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2005-06-09 21:59:22 +01:00
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2005-04-16 15:20:36 -07:00
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2006-12-06 17:25:04 +01:00
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2005-04-16 15:20:36 -07:00
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2006-01-14 16:36:50 +00:00
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2005-04-16 15:20:36 -07:00
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2005-11-07 21:12:08 +00:00
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2005-04-16 15:20:36 -07:00
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2006-01-14 16:36:50 +00:00
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2005-04-16 15:20:36 -07:00
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2006-01-14 16:33:50 +00:00
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2005-04-16 15:20:36 -07:00
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2005-11-15 11:31:41 +00:00
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2005-04-16 15:20:36 -07:00
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2005-07-11 21:03:49 -07:00
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2005-04-16 15:20:36 -07:00
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2005-11-12 20:25:25 +00:00
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2006-09-26 17:36:37 +09:00
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2005-04-16 15:20:36 -07:00
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2006-09-18 23:10:26 +01:00
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2005-06-12 23:26:05 +01:00
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[ARM] 3388/1: ixp23xx: add core ixp23xx support
Patch from Lennert Buytenhek
This patch adds support for the Intel ixp23xx series of CPUs. The
ixp23xx is an XSC3 based CPU with 512K of L2 cache, a 64bit 66MHz PCI
interface, two DDR RAM interfaces, QDR RAM interfaces, two gigabit
MACs, two 10/100 MACs, expansion bus, four microengines, a Media and
Switch Fabric unit almost identical to the one on the ixp2400, two
xscale (8250ish) UARTs and a bunch of other stuff.
This patch adds the core ixp23xx support code, and support for the
ADI Engineering Roadrunner, Intel IXDP2351, and IP Fabrics Double
Espresso platforms.
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2006-03-28 21:18:54 +01:00
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2005-04-16 15:20:36 -07:00
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2006-11-17 00:14:35 +01:00
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2005-04-16 15:20:36 -07:00
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2005-07-11 21:03:49 -07:00
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2005-04-16 15:20:36 -07:00
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[PATCH] spi: simple SPI framework
This is the core of a small SPI framework, implementing the model of a
queue of messages which complete asynchronously (with thin synchronous
wrappers on top).
- It's still less than 2KB of ".text" (ARM). If there's got to be a
mid-layer for something so simple, that's the right size budget. :)
- The guts use board-specific SPI device tables to build the driver
model tree. (Hardware probing is rarely an option.)
- This version of Kconfig includes no drivers. At this writing there
are two known master controller drivers (PXA/SSP, OMAP MicroWire)
and three protocol drivers (CS8415a, ADS7846, DataFlash) with LKML
mentions of other drivers in development.
- No userspace API. There are several implementations to compare.
Implement them like any other driver, and bind them with sysfs.
The changes from last version posted to LKML (on 11-Nov-2005) are minor,
and include:
- One bugfix (removes a FIXME), with the visible effect of making device
names be "spiB.C" where B is the bus number and C is the chipselect.
- The "caller provides DMA mappings" mechanism now has kerneldoc, for
DMA drivers that want to be fancy.
- Hey, the framework init can be subsys_init. Even though board init
logic fires earlier, at arch_init ... since the framework init is
for driver support, and the board init support uses static init.
- Various additional spec/doc clarifications based on discussions
with other folk. It adds a brief "thank you" at the end, for folk
who've helped nudge this framework into existence.
As I've said before, I think that "protocol tweaking" is the main support
that this driver framework will need to evolve.
From: Mark Underwood <basicmark@yahoo.com>
Update the SPI framework to remove a potential priority inversion case by
reverting to kmalloc if the pre-allocated DMA-safe buffer isn't available.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-08 13:34:19 -08:00
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2006-03-10 22:30:01 +00:00
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2005-07-02 18:15:49 +02:00
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2005-04-16 15:20:36 -07:00
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2005-08-18 10:06:59 +01:00
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2006-03-31 02:31:04 -08:00
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2005-04-16 15:20:36 -07:00
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2006-12-12 10:32:42 +01:00
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2005-04-16 15:20:36 -07:00
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2006-03-27 01:16:35 -08:00
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2005-04-16 15:20:36 -07:00
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