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linux/include/clocksource/timer-ti-dm.h

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[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2 Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-07 17:20:27 +01:00
OMAP2420: hwmod data: add dmtimer Add dmtimer data. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Acked-by: Benoit Cousson <b-cousson@ti.com>
2011-02-23 00:14:04 -07:00
[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2 Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-07 17:20:27 +01:00
ARM: OMAP: Port dmtimers to OMAP2 and implement PWM support Port dmtimer framework to OMAP2. Modify the dmtimers API to support setting of PWM configuration and prescaler. Convert 32 kHz timer and GP timer to use the dmtimer framework. Signed-off-by: Timo Teras <timo.teras@solidboot.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2006-06-26 16:16:12 -07:00
[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2 Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-07 17:20:27 +01:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
OMAP: dmtimer: add missing include After commit caf64f2fdc48472995d40656eb1a75524c464447 ("omap: Make a subset of dmtimer functions into inline functions"), arch/arm/plat-omap/include/plat/dmtimer.h is missing an include of linux/io.h - add it. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Tony Lindgren <tony@atomide.com>
2011-07-09 18:00:25 -06:00
ARM: OMAP1: dmtimer: conversion to platform devices Convert OMAP1 dmtimers into a platform devices and then registers with device model framework so that it can be bound to corresponding driver. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-20 17:00:17 +05:30
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
clocksource: timer-ti-dm: Replace architecture Replace architecture specific guard with clocksource guard. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-15 11:31:45 +05:30
[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2 Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-07 17:20:27 +01:00
ARM: OMAP: Port dmtimers to OMAP2 and implement PWM support Port dmtimer framework to OMAP2. Modify the dmtimers API to support setting of PWM configuration and prescaler. Convert 32 kHz timer and GP timer to use the dmtimer framework. Signed-off-by: Timo Teras <timo.teras@solidboot.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2006-06-26 16:16:12 -07:00
[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2 Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-07 17:20:27 +01:00
ARM: OMAP: Port dmtimers to OMAP2 and implement PWM support Port dmtimer framework to OMAP2. Modify the dmtimers API to support setting of PWM configuration and prescaler. Convert 32 kHz timer and GP timer to use the dmtimer framework. Signed-off-by: Timo Teras <timo.teras@solidboot.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2006-06-26 16:16:12 -07:00
[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2 Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-07 17:20:27 +01:00
ARM: OMAP: Port dmtimers to OMAP2 and implement PWM support Port dmtimer framework to OMAP2. Modify the dmtimers API to support setting of PWM configuration and prescaler. Convert 32 kHz timer and GP timer to use the dmtimer framework. Signed-off-by: Timo Teras <timo.teras@solidboot.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2006-06-26 16:16:12 -07:00
[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2 Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-07 17:20:27 +01:00
ARM: OMAP: Add DMTIMER definitions for posted mode For OMAP2+ devices, when using DMTIMERs for system timers (clock-events and clock-source) the posted mode configuration of the timers is used. To allow the compiler to optimise the functions for configuring and reading the system timers, the posted flag variable is hard-coded with the value 1. To make it clear that posted mode is being used add some definitions so that it is more readable. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-27 11:49:45 -05:00
ARM: OMAP2+: dmtimer: convert to platform devices Add routines to converts dmtimers to platform devices. The device data is obtained from hwmod database of respective platform and is registered to device model after successful binding to driver. In addition, capability attribute of each of the timers is added in hwmod database. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-20 17:00:18 +05:30
ARM: OMAP: Add flag to indicate if a timer needs a manual reset For OMAP1 devices, it is necessary to perform a manual reset of the timer. Currently, this is indicating by setting the "needs_manual_reset" variable in the platform data. Instead of using an extra variable to indicate this add a new timer capabilities flag to indicate this and remove the "needs_manual_reset" member from the platform data. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-05 12:34:57 -05:00
ARM: OMAP: Add a timer attribute for timers that can interrupt the DSP Some instances of the DMTIMER peripheral on OMAP devices have the ability to interrupt the on-chip DSP in addition to the ARM CPU. Add a DMTIMER attribute to indicate which timers can interrupt the DSP. By using the omap_dm_timer_request_by_cap() API, driver will now be able to allocate a DMTIMER that can interrupt the DSP based upon this attribute and not require the driver to know which instance has this capability. DMTIMERs that have the ability to interrupt the DSP on OMAP devices are as follows ... - OMAP1 (OMAP5912/16xx/17xx) devices - All 8 DMTIMERs - OMAP2/3/4 devices - DMTIMERs 5-8 Please note that for OMAP3+, timer8 has the ability to interrupt the DSP and generate a PWM output. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-09-23 17:28:27 -06:00
ARM: OMAP2+: dmtimer: convert to platform devices Add routines to converts dmtimers to platform devices. The device data is obtained from hwmod database of respective platform and is registered to device model after successful binding to driver. In addition, capability attribute of each of the timers is added in hwmod database. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Cousson, Benoit <b-cousson@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-20 17:00:18 +05:30
ARM: OMAP3+: Implement timer workaround for errata i103 and i767 Errata Titles: i103: Delay needed to read some GP timer, WD timer and sync timer registers after wakeup (OMAP3/4) i767: Delay needed to read some GP timer registers after wakeup (OMAP5) Description (i103/i767): If a General Purpose Timer (GPTimer) is in posted mode (TSICR [2].POSTED=1), due to internal resynchronizations, values read in TCRR, TCAR1 and TCAR2 registers right after the timer interface clock (L4) goes from stopped to active may not return the expected values. The most common event leading to this situation occurs upon wake up from idle. GPTimer non-posted synchronization mode is not impacted by this limitation. Workarounds: 1). Disable posted mode 2). Use static dependency between timer clock domain and MPUSS clock domain 3). Use no-idle mode when the timer is active Workarounds #2 and #3 are not pratical from a power standpoint and so workaround #1 has been implemented. Disabling posted mode adds some CPU overhead for configuring and reading the timers as the CPU has to wait for accesses to be re-synchronised within the timer. However, disabling posted mode guarantees correct operation. Please note that it is safe to use posted mode for timers if the counter (TCRR) and capture (TCARx) registers will never be read. An example of this is the clock-event system timer. This is used by the kernel to schedule events however, the timers counter is never read and capture registers are not used. Given that the kernel configures this timer often yet never reads the counter register it is safe to enable posted mode in this case. Hence, for the timer used for kernel clock-events, posted mode is enabled by overriding the errata for devices that are impacted by this defect. For drivers using the timers that do not read the counter or capture registers and wish to use posted mode, can override the errata and enable posted mode by making the following function calls. __omap_dm_timer_override_errata(timer, OMAP_TIMER_ERRATA_I103_I767); __omap_dm_timer_enable_posted(timer); Both dmtimers and watchdogs are impacted by this defect this patch only implements the workaround for the dmtimer. Currently the watchdog driver does not read the counter register and so no workaround is necessary. Posted mode will be disabled for all OMAP2+ devices (including AM33xx) using a GP timer as a clock-source timer to guarantee correct operation. This is not necessary for OMAP24xx devices but the default clock-source timer for OMAP24xx devices is the 32k-sync timer and not the GP timer and so should not have any impact. This should be re-visited for future devices if this errata is fixed. Confirmed with Vaibhav Hiremath that this bug also impacts AM33xx devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-27 12:47:43 -05:00
ARM: OMAP: dmtimer: low-power mode support Clock is enabled only when timer is started and disabled when the the timer is stopped. Therefore before accessing registers in functions clock is enabled and then disabled back at the end of access. Context save is done dynamically whenever the registers are modified. Context restore is called when context is lost. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [tony@atomide.com: updated to use revision instead of tidr] Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-20 17:00:24 +05:30
ARM: OMAP: Remove unnecessary omap_dm_timer structure declaration Remove unnecessary declaration of structure omap_dm_timer from dmtimer.h and move the actual declaration of structure omap_dm_timer towards top of dmtimer.h to avoid any compilation errors. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
2012-09-28 17:40:22 -05:00
ARM: OMAP2+: Add dmtimer platform function to reserve systimers During early boot, one or two dmtimers are reserved by the kernel as system timers (for clocksource and clockevents). These timers are marked as reserved and the dmtimer driver is notified which timers have been reserved via the platform data information. For OMAP2+ devices the timers reserved may vary depending on device and compile flags. Therefore, it is not easy to assume which timers we be reserved for the system timers. In order to migrate the dmtimer driver to support device-tree we need a way to pass the timers reserved for system timers to the dmtimer driver. Using the platform data structure will not work in the same way as it is currently used because the platform data structure will be stored statically in the dmtimer itself and the platform data will be selected via the device-tree match device function (of_match_device). There are a couple ways to workaround this. One option is to store the system timers reserved for the kernel in the device-tree and query them on boot. The downside of this approach is that it adds some delay to parse the DT blob to search for the system timers. Secondly, for OMAP3 devices we have a dependency on compile time flags and the device-tree would not be aware of that kernel compile flags and so we would need to address that. The second option is to add a function to the dmtimer code to reserved the system timers during boot and so the dmtimer knows exactly which timers are being used for system timers. This also allows us to remove the "reserved" member from the timer platform data. This seemed like the simpler approach and so was implemented here. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2012-06-05 12:34:51 -05:00
ARM: OMAP: Add function to request a timer by capability Currently OMAP timers can be requested by requesting any available or by a numerical device ID. If a specific timer is required because it has a particular capability, such as can interrupt the on-chip DSP in addition to the ARM CPU, then the user needs to know the device ID of the timer with this feature. Therefore, add a new API called omap_dm_timer_request_by_cap() that allows drivers to request a timer by capability. Signed-off-by: Jon Hunter <jon-hunter@ti.com>
2012-09-06 15:28:00 -05:00
[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2 Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-07 17:20:27 +01:00
ARM: OMAP: Port dmtimers to OMAP2 and implement PWM support Port dmtimer framework to OMAP2. Modify the dmtimers API to support setting of PWM configuration and prescaler. Convert 32 kHz timer and GP timer to use the dmtimer framework. Signed-off-by: Timo Teras <timo.teras@solidboot.com> Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2006-06-26 16:16:12 -07:00
ARM: OMAP: timer: Wrap the inline functions under OMAP2PLUS define Wrap the inline functions under OMAP2PLUS/OMAP1 defines. This patch also inlines omap_dm_timer_get_fclk function for non OMAP1 Config. Signed-off-by: Keerthy <j-keerthy@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-15 11:31:43 +05:30
ARM: OMAP: dmtimer: add error handling to export APIs Add error handling code to export APIs. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-20 17:00:26 +05:30
[ARM] 2888/1: OMAP 3/4: Update omap include files, take 2 Patch from Tony Lindgren This patch syncs the mainline kernel with linux-omap tree. The highlights of the patch are: - Start adding 24xx support by Paul Mundt - Clean-up of cpu detection by Dirk Behme and Tony Lindgren - Add DSP header by Toshihiro Kobayashi - Add support for mtd-xip by Vladimir Barinov - Add various new mux registers - Move OMAP specific serial defines back to serial.h Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-09-07 17:20:27 +01:00
omap: Move dmtimer defines to dmtimer.h These will be needed when dmtimer platform init code gets split for omap1 and omap2+. These will also be needed for separate sys_timer init and driver init for the rest of the hardware timers in the following patches. No functional changes. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Move dmtimer defines to dmtimer.h These will be needed when dmtimer platform init code gets split for omap1 and omap2+. These will also be needed for separate sys_timer init and driver init for the rest of the hardware timers in the following patches. No functional changes. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: timer: Wrap the inline functions under OMAP2PLUS define Wrap the inline functions under OMAP2PLUS/OMAP1 defines. This patch also inlines omap_dm_timer_get_fclk function for non OMAP1 Config. Signed-off-by: Keerthy <j-keerthy@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-15 11:31:43 +05:30
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: dmtimer: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-15 20:37:47 +03:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: dmtimer: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-15 20:37:47 +03:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: dmtimer: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-15 20:37:47 +03:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: dmtimer: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-15 20:37:47 +03:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
ARM: OMAP: dmtimer: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-15 20:37:47 +03:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
ARM: OMAP: dmtimer: low-power mode support Clock is enabled only when timer is started and disabled when the the timer is stopped. Therefore before accessing registers in functions clock is enabled and then disabled back at the end of access. Context save is done dynamically whenever the registers are modified. Context restore is called when context is lost. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [tony@atomide.com: updated to use revision instead of tidr] Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-20 17:00:24 +05:30
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
ARM: OMAP: Add dmtimer interrupt disable function The OMAP dmtimer driver does not currently have a function to disable the timer interrupts. For some timer instances the timer interrupt enable function can be used to disable the interrupts because the same interrupt enable register is used to disable interrupts. However, some timer instances have separate interrupt enable/disable registers and so this will not work. Therefore, add a dedicated function to disable interrupts. This change is required for OMAP4+ devices. For OMAP4, all timers apart from 1, 2 and 10 need this function and for OMAP5 all timers need this function. Please note that the interrupt disable function has been written so that it can be used by all OMAP devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-07-13 14:03:18 -05:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
ARM: OMAP: dmtimer: low-power mode support Clock is enabled only when timer is started and disabled when the the timer is stopped. Therefore before accessing registers in functions clock is enabled and then disabled back at the end of access. Context save is done dynamically whenever the registers are modified. Context restore is called when context is lost. Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [tony@atomide.com: updated to use revision instead of tidr] Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-20 17:00:24 +05:30
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP3+: Implement timer workaround for errata i103 and i767 Errata Titles: i103: Delay needed to read some GP timer, WD timer and sync timer registers after wakeup (OMAP3/4) i767: Delay needed to read some GP timer registers after wakeup (OMAP5) Description (i103/i767): If a General Purpose Timer (GPTimer) is in posted mode (TSICR [2].POSTED=1), due to internal resynchronizations, values read in TCRR, TCAR1 and TCAR2 registers right after the timer interface clock (L4) goes from stopped to active may not return the expected values. The most common event leading to this situation occurs upon wake up from idle. GPTimer non-posted synchronization mode is not impacted by this limitation. Workarounds: 1). Disable posted mode 2). Use static dependency between timer clock domain and MPUSS clock domain 3). Use no-idle mode when the timer is active Workarounds #2 and #3 are not pratical from a power standpoint and so workaround #1 has been implemented. Disabling posted mode adds some CPU overhead for configuring and reading the timers as the CPU has to wait for accesses to be re-synchronised within the timer. However, disabling posted mode guarantees correct operation. Please note that it is safe to use posted mode for timers if the counter (TCRR) and capture (TCARx) registers will never be read. An example of this is the clock-event system timer. This is used by the kernel to schedule events however, the timers counter is never read and capture registers are not used. Given that the kernel configures this timer often yet never reads the counter register it is safe to enable posted mode in this case. Hence, for the timer used for kernel clock-events, posted mode is enabled by overriding the errata for devices that are impacted by this defect. For drivers using the timers that do not read the counter or capture registers and wish to use posted mode, can override the errata and enable posted mode by making the following function calls. __omap_dm_timer_override_errata(timer, OMAP_TIMER_ERRATA_I103_I767); __omap_dm_timer_enable_posted(timer); Both dmtimers and watchdogs are impacted by this defect this patch only implements the workaround for the dmtimer. Currently the watchdog driver does not read the counter register and so no workaround is necessary. Posted mode will be disabled for all OMAP2+ devices (including AM33xx) using a GP timer as a clock-source timer to guarantee correct operation. This is not necessary for OMAP24xx devices but the default clock-source timer for OMAP24xx devices is the 32k-sync timer and not the GP timer and so should not have any impact. This should be re-visited for future devices if this errata is fixed. Confirmed with Vaibhav Hiremath that this bug also impacts AM33xx devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-27 12:47:43 -05:00
ARM: OMAP2+: Disable POSTED mode for errata i103 and i767 Enabling of Posted mode is seen to cause problems on dmtimer modules on AM33xx (much like other OMAPs). Reference discussions on forums [1] [2]. Earlier patch solving this on other OMAPs [3]. For OMAP SoCs with this errata, the fix has been to not enable Posted mode. However, on some SoCs (atleast AM33xx) which carry this errata, Posted mode is enabled on reset. So we not only need to ignore enabling of the POSTED bit when the timer is requested, but also disable Posted mode if errata is present. [1] http://e2e.ti.com/support/arm/sitara_arm/f/791/t/285744.aspx [2] http://e2e.ti.com/support/arm/sitara_arm/f/791/t/270632.aspx [3] http://www.spinics.net/lists/linux-omap/msg81770.html Cc: stable@vgerk.kernel.org Reported-by: Russ Dill <russ.dill@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-11-26 15:03:36 -08:00
ARM: OMAP3+: Implement timer workaround for errata i103 and i767 Errata Titles: i103: Delay needed to read some GP timer, WD timer and sync timer registers after wakeup (OMAP3/4) i767: Delay needed to read some GP timer registers after wakeup (OMAP5) Description (i103/i767): If a General Purpose Timer (GPTimer) is in posted mode (TSICR [2].POSTED=1), due to internal resynchronizations, values read in TCRR, TCAR1 and TCAR2 registers right after the timer interface clock (L4) goes from stopped to active may not return the expected values. The most common event leading to this situation occurs upon wake up from idle. GPTimer non-posted synchronization mode is not impacted by this limitation. Workarounds: 1). Disable posted mode 2). Use static dependency between timer clock domain and MPUSS clock domain 3). Use no-idle mode when the timer is active Workarounds #2 and #3 are not pratical from a power standpoint and so workaround #1 has been implemented. Disabling posted mode adds some CPU overhead for configuring and reading the timers as the CPU has to wait for accesses to be re-synchronised within the timer. However, disabling posted mode guarantees correct operation. Please note that it is safe to use posted mode for timers if the counter (TCRR) and capture (TCARx) registers will never be read. An example of this is the clock-event system timer. This is used by the kernel to schedule events however, the timers counter is never read and capture registers are not used. Given that the kernel configures this timer often yet never reads the counter register it is safe to enable posted mode in this case. Hence, for the timer used for kernel clock-events, posted mode is enabled by overriding the errata for devices that are impacted by this defect. For drivers using the timers that do not read the counter or capture registers and wish to use posted mode, can override the errata and enable posted mode by making the following function calls. __omap_dm_timer_override_errata(timer, OMAP_TIMER_ERRATA_I103_I767); __omap_dm_timer_enable_posted(timer); Both dmtimers and watchdogs are impacted by this defect this patch only implements the workaround for the dmtimer. Currently the watchdog driver does not read the counter register and so no workaround is necessary. Posted mode will be disabled for all OMAP2+ devices (including AM33xx) using a GP timer as a clock-source timer to guarantee correct operation. This is not necessary for OMAP24xx devices but the default clock-source timer for OMAP24xx devices is the 32k-sync timer and not the GP timer and so should not have any impact. This should be re-visited for future devices if this errata is fixed. Confirmed with Vaibhav Hiremath that this bug also impacts AM33xx devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-27 12:47:43 -05:00
ARM: OMAP2+: Disable POSTED mode for errata i103 and i767 Enabling of Posted mode is seen to cause problems on dmtimer modules on AM33xx (much like other OMAPs). Reference discussions on forums [1] [2]. Earlier patch solving this on other OMAPs [3]. For OMAP SoCs with this errata, the fix has been to not enable Posted mode. However, on some SoCs (atleast AM33xx) which carry this errata, Posted mode is enabled on reset. So we not only need to ignore enabling of the POSTED bit when the timer is requested, but also disable Posted mode if errata is present. [1] http://e2e.ti.com/support/arm/sitara_arm/f/791/t/285744.aspx [2] http://e2e.ti.com/support/arm/sitara_arm/f/791/t/270632.aspx [3] http://www.spinics.net/lists/linux-omap/msg81770.html Cc: stable@vgerk.kernel.org Reported-by: Russ Dill <russ.dill@ti.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2013-11-26 15:03:36 -08:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
ARM: OMAP3+: Implement timer workaround for errata i103 and i767 Errata Titles: i103: Delay needed to read some GP timer, WD timer and sync timer registers after wakeup (OMAP3/4) i767: Delay needed to read some GP timer registers after wakeup (OMAP5) Description (i103/i767): If a General Purpose Timer (GPTimer) is in posted mode (TSICR [2].POSTED=1), due to internal resynchronizations, values read in TCRR, TCAR1 and TCAR2 registers right after the timer interface clock (L4) goes from stopped to active may not return the expected values. The most common event leading to this situation occurs upon wake up from idle. GPTimer non-posted synchronization mode is not impacted by this limitation. Workarounds: 1). Disable posted mode 2). Use static dependency between timer clock domain and MPUSS clock domain 3). Use no-idle mode when the timer is active Workarounds #2 and #3 are not pratical from a power standpoint and so workaround #1 has been implemented. Disabling posted mode adds some CPU overhead for configuring and reading the timers as the CPU has to wait for accesses to be re-synchronised within the timer. However, disabling posted mode guarantees correct operation. Please note that it is safe to use posted mode for timers if the counter (TCRR) and capture (TCARx) registers will never be read. An example of this is the clock-event system timer. This is used by the kernel to schedule events however, the timers counter is never read and capture registers are not used. Given that the kernel configures this timer often yet never reads the counter register it is safe to enable posted mode in this case. Hence, for the timer used for kernel clock-events, posted mode is enabled by overriding the errata for devices that are impacted by this defect. For drivers using the timers that do not read the counter or capture registers and wish to use posted mode, can override the errata and enable posted mode by making the following function calls. __omap_dm_timer_override_errata(timer, OMAP_TIMER_ERRATA_I103_I767); __omap_dm_timer_enable_posted(timer); Both dmtimers and watchdogs are impacted by this defect this patch only implements the workaround for the dmtimer. Currently the watchdog driver does not read the counter register and so no workaround is necessary. Posted mode will be disabled for all OMAP2+ devices (including AM33xx) using a GP timer as a clock-source timer to guarantee correct operation. This is not necessary for OMAP24xx devices but the default clock-source timer for OMAP24xx devices is the 32k-sync timer and not the GP timer and so should not have any impact. This should be re-visited for future devices if this errata is fixed. Confirmed with Vaibhav Hiremath that this bug also impacts AM33xx devices. Signed-off-by: Jon Hunter <jon-hunter@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
2012-09-27 12:47:43 -05:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: dmtimer: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-15 20:37:47 +03:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: dmtimer: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-15 20:37:47 +03:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: Add support for dmtimer v2 ip The registers are slightly different between v1 and v2 ip that is available in omap4 and later for some timers. Add support for v2 ip by mapping the interrupt related registers separately and adding func_base for the functional registers. Also disable dmtimer driver features on omap4 for now as those need the hwmod conversion series to deal with enabling the timers properly in omap_dm_timer_init. Signed-off-by: Afzal Mohammed <afzal@ti.com> Tested-by: Hemant Pedanekar <hemantp@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-09-16 15:44:20 -07:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: dmtimer: raw read and write endian fix All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-04-15 20:37:47 +03:00
omap: Make a subset of dmtimer functions into inline functions This will allow us to share the code between system timer and dmtimer device driver code without having to initialize all the dmtimers early. This change will also make the timer_set_next_event more efficient as the inline functions will optimize the code better for the timer reprogramming. Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-03-29 15:54:48 -07:00
ARM: OMAP: timer: Wrap the inline functions under OMAP2PLUS define Wrap the inline functions under OMAP2PLUS/OMAP1 defines. This patch also inlines omap_dm_timer_get_fclk function for non OMAP1 Config. Signed-off-by: Keerthy <j-keerthy@ti.com> Tested-by: Ladislav Michl <ladis@linux-mips.org> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-15 11:31:43 +05:30
clocksource: timer-ti-dm: Replace architecture Replace architecture specific guard with clocksource guard. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-15 11:31:45 +05:30