kernel/linux
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ synced 2026-10-14 05:55:17 +00:00
Code Issues Releases Packages Activity
linux/drivers/clocksource/timer-mediatek.c

341 lines
8.9 KiB
Raw Permalink Normal View History

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157 Based on 3 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version [author] [graeme] [gregory] [gg]@[slimlogic] [co] [uk] [author] [kishon] [vijay] [abraham] [i] [kishon]@[ti] [com] [based] [on] [twl6030]_[usb] [c] [author] [hema] [hk] [hemahk]@[ti] [com] this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 1105 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070033.202006027@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-27 08:55:06 +02:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/mtk_timer: Add pr_fmt define It's a bit unclear what subsystem/driver emits some messages to dmesg in the function mtk_init_timer(). Use pr_fmt to auto-prefix the messages appropriately. Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Alexey Klimov <alexey.klimov@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-10-25 23:21:22 +00:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/mediatek: Use GPT as sched clock source When cpu is in deep idle, arch timer will stop counting. Setup GPT as sched clock source so it can keep counting in idle. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-07-13 17:32:46 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Add support for system timer This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:28 +08:00
clocksource/drivers/mediatek: Optimize systimer irq clear flow on shutdown mtk_syst_clkevt_shutdown is called after irq disabled in suspend flow, clear any pending systimer irq when shutdown to avoid suspend aborted due to timer irq pending Also as for systimer in mediatek socs, there must be firstly enable timer before clear systimer irq Fixes: e3af677607d9("clocksource/drivers/timer-mediatek: Add support for system timer") Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.com> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1617960162-1988-2-git-send-email-Fengquan.Chen@mediatek.com
2021-04-09 17:22:42 +08:00
clocksource/drivers/timer-mediatek: Add support for system timer This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:28 +08:00
clocksource/drivers/mediatek: Optimize systimer irq clear flow on shutdown mtk_syst_clkevt_shutdown is called after irq disabled in suspend flow, clear any pending systimer irq when shutdown to avoid suspend aborted due to timer irq pending Also as for systimer in mediatek socs, there must be firstly enable timer before clear systimer irq Fixes: e3af677607d9("clocksource/drivers/timer-mediatek: Add support for system timer") Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.com> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1617960162-1988-2-git-send-email-Fengquan.Chen@mediatek.com
2021-04-09 17:22:42 +08:00
clocksource/drivers/timer-mediatek: Add support for system timer This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:28 +08:00
clocksource/drivers/mediatek: Use GPT as sched clock source When cpu is in deep idle, arch timer will stop counting. Setup GPT as sched clock source so it can keep counting in idle. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-07-13 17:32:46 +08:00
clocksource/drivers/timer-mediatek: Add support for system timer This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:28 +08:00
clocksource/drivers/mediatek: Optimize systimer irq clear flow on shutdown mtk_syst_clkevt_shutdown is called after irq disabled in suspend flow, clear any pending systimer irq when shutdown to avoid suspend aborted due to timer irq pending Also as for systimer in mediatek socs, there must be firstly enable timer before clear systimer irq Fixes: e3af677607d9("clocksource/drivers/timer-mediatek: Add support for system timer") Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.com> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1617960162-1988-2-git-send-email-Fengquan.Chen@mediatek.com
2021-04-09 17:22:42 +08:00
clocksource/drivers/timer-mediatek: Add support for system timer This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:28 +08:00
clocksource/drivers/mediatek: Optimize systimer irq clear flow on shutdown mtk_syst_clkevt_shutdown is called after irq disabled in suspend flow, clear any pending systimer irq when shutdown to avoid suspend aborted due to timer irq pending Also as for systimer in mediatek socs, there must be firstly enable timer before clear systimer irq Fixes: e3af677607d9("clocksource/drivers/timer-mediatek: Add support for system timer") Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.com> Tested-by: Hsin-Yi Wang <hsinyi@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/1617960162-1988-2-git-send-email-Fengquan.Chen@mediatek.com
2021-04-09 17:22:42 +08:00
clocksource/drivers/timer-mediatek: Add support for system timer This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:28 +08:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource/drivers/mediatek: Use GPT as sched clock source When cpu is in deep idle, arch timer will stop counting. Setup GPT as sched clock source so it can keep counting in idle. Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
2015-07-13 17:32:46 +08:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clockevents/drivers/mtk: Migrate to new 'set-state' interface Migrate mtk driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Cc: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-06-18 16:24:27 +05:30
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clockevents/drivers/mtk: Migrate to new 'set-state' interface Migrate mtk driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Cc: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-06-18 16:24:27 +05:30
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clockevents/drivers/mtk: Migrate to new 'set-state' interface Migrate mtk driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Cc: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-06-18 16:24:27 +05:30
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clockevents/drivers/mtk: Fix spurious interrupt leading to crash After analysis done by Yingjoe Chen, the timer appears to have a pending interrupt when it is enabled. Fix this by acknowledging the pending interrupt when enabling the timer interrupt. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
2015-08-24 15:14:30 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clockevents/drivers/mtk: Fix spurious interrupt leading to crash After analysis done by Yingjoe Chen, the timer appears to have a pending interrupt when it is enabled. Fix this by acknowledging the pending interrupt when enabling the timer interrupt. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
2015-08-24 15:14:30 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clockevents/drivers/mtk: Fix spurious interrupt leading to crash After analysis done by Yingjoe Chen, the timer appears to have a pending interrupt when it is enabled. Fix this by acknowledging the pending interrupt when enabling the timer interrupt. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Tested-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
2015-08-24 15:14:30 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/mediatek: Ack and disable interrupts on suspend Interrupts are disabled during suspend before this driver disables its timers. ARM trusted firmware will abort suspend if the timer irq is pending, so ack and disable the timer interrupt during suspend. Signed-off-by: Evan Benn <evanbenn@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210512122528.v4.1.I1d9917047de06715da16e1620759f703fcfdcbcb@changeid
2021-05-12 12:25:44 +10:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource/drivers/timer-mediatek: Add support for system timer This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:28 +08:00
clocksource/drivers/mediatek: Fix error handling When timer_of_init fails, it cleans up after itself by undoing everything it did during the initialization function. mtk_syst_init and mtk_gpt_init both call timer_of_cleanup if timer_of_init fails. timer_of_cleanup try to release the resource taken. Since these resources have already been cleaned up by timer_of_init, we end up getting a few warnings printed: [ 0.001935] WARNING: CPU: 0 PID: 0 at __clk_put+0xe8/0x128 [ 0.002650] Modules linked in: [ 0.003058] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.19.67+ #1 [ 0.003852] Hardware name: MediaTek MT8183 (DT) [ 0.004446] pstate: 20400085 (nzCv daIf +PAN -UAO) [ 0.005073] pc : __clk_put+0xe8/0x128 [ 0.005555] lr : clk_put+0xc/0x14 [ 0.005988] sp : ffffff80090b3ea0 [ 0.006422] x29: ffffff80090b3ea0 x28: 0000000040e20018 [ 0.007121] x27: ffffffc07bfff780 x26: 0000000000000001 [ 0.007819] x25: ffffff80090bda80 x24: ffffff8008ec5828 [ 0.008517] x23: ffffff80090bd000 x22: ffffff8008d8b2e8 [ 0.009216] x21: 0000000000000001 x20: fffffffffffffdfb [ 0.009914] x19: ffffff8009166180 x18: 00000000002bffa8 [ 0.010612] x17: ffffffc012996980 x16: 0000000000000000 [ 0.011311] x15: ffffffbf004a6800 x14: 3536343038393334 [ 0.012009] x13: 2079726576652073 x12: 7eb9c62c5c38f100 [ 0.012707] x11: ffffff80090b3ba0 x10: ffffff80090b3ba0 [ 0.013405] x9 : 0000000000000004 x8 : 0000000000000040 [ 0.014103] x7 : ffffffc079400270 x6 : 0000000000000000 [ 0.014801] x5 : ffffffc079400248 x4 : 0000000000000000 [ 0.015499] x3 : 0000000000000000 x2 : 0000000000000000 [ 0.016197] x1 : ffffff80091661c0 x0 : fffffffffffffdfb [ 0.016896] Call trace: [ 0.017218] __clk_put+0xe8/0x128 [ 0.017654] clk_put+0xc/0x14 [ 0.018048] timer_of_cleanup+0x60/0x7c [ 0.018551] mtk_syst_init+0x8c/0x9c [ 0.019020] timer_probe+0x6c/0xe0 [ 0.019469] time_init+0x14/0x44 [ 0.019893] start_kernel+0x2d0/0x46c [ 0.020378] ---[ end trace 8c1efabea1267649 ]--- [ 0.020982] ------------[ cut here ]------------ [ 0.021586] Trying to vfree() nonexistent vm area ((____ptrval____)) [ 0.022427] WARNING: CPU: 0 PID: 0 at __vunmap+0xd0/0xd8 [ 0.023119] Modules linked in: [ 0.023524] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 4.19.67+ #1 [ 0.024498] Hardware name: MediaTek MT8183 (DT) [ 0.025091] pstate: 60400085 (nZCv daIf +PAN -UAO) [ 0.025718] pc : __vunmap+0xd0/0xd8 [ 0.026176] lr : __vunmap+0xd0/0xd8 [ 0.026632] sp : ffffff80090b3e90 [ 0.027066] x29: ffffff80090b3e90 x28: 0000000040e20018 [ 0.027764] x27: ffffffc07bfff780 x26: 0000000000000001 [ 0.028462] x25: ffffff80090bda80 x24: ffffff8008ec5828 [ 0.029160] x23: ffffff80090bd000 x22: ffffff8008d8b2e8 [ 0.029858] x21: 0000000000000000 x20: 0000000000000000 [ 0.030556] x19: ffffff800800d000 x18: 00000000002bffa8 [ 0.031254] x17: 0000000000000000 x16: 0000000000000000 [ 0.031952] x15: ffffffbf004a6800 x14: 3536343038393334 [ 0.032651] x13: 2079726576652073 x12: 7eb9c62c5c38f100 [ 0.033349] x11: ffffff80090b3b40 x10: ffffff80090b3b40 [ 0.034047] x9 : 0000000000000005 x8 : 5f5f6c6176727470 [ 0.034745] x7 : 5f5f5f5f28282061 x6 : ffffff80091c86ef [ 0.035443] x5 : ffffff800852b690 x4 : 0000000000000000 [ 0.036141] x3 : 0000000000000002 x2 : 0000000000000002 [ 0.036839] x1 : 7eb9c62c5c38f100 x0 : 7eb9c62c5c38f100 [ 0.037536] Call trace: [ 0.037859] __vunmap+0xd0/0xd8 [ 0.038271] vunmap+0x24/0x30 [ 0.038664] __iounmap+0x2c/0x34 [ 0.039088] timer_of_cleanup+0x70/0x7c [ 0.039591] mtk_syst_init+0x8c/0x9c [ 0.040060] timer_probe+0x6c/0xe0 [ 0.040507] time_init+0x14/0x44 [ 0.040932] start_kernel+0x2d0/0x46c This commit remove the calls to timer_of_cleanup when timer_of_init fails since it is unnecessary and actually cause warnings to be printed. Fixes: a0858f937960 ("mediatek: Convert the driver to timer-of") Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/linux-arm-kernel/20190919191315.25190-1-fparent@baylibre.com/
2019-09-19 21:13:15 +02:00
clocksource/drivers/timer-mediatek: Add support for system timer This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:28 +08:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource/drivers/mediatek: Ack and disable interrupts on suspend Interrupts are disabled during suspend before this driver disables its timers. ARM trusted firmware will abort suspend if the timer irq is pending, so ack and disable the timer interrupt during suspend. Signed-off-by: Evan Benn <evanbenn@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20210512122528.v4.1.I1d9917047de06715da16e1620759f703fcfdcbcb@changeid
2021-05-12 12:25:44 +10:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource/drivers/mediatek: Fix error handling When timer_of_init fails, it cleans up after itself by undoing everything it did during the initialization function. mtk_syst_init and mtk_gpt_init both call timer_of_cleanup if timer_of_init fails. timer_of_cleanup try to release the resource taken. Since these resources have already been cleaned up by timer_of_init, we end up getting a few warnings printed: [ 0.001935] WARNING: CPU: 0 PID: 0 at __clk_put+0xe8/0x128 [ 0.002650] Modules linked in: [ 0.003058] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.19.67+ #1 [ 0.003852] Hardware name: MediaTek MT8183 (DT) [ 0.004446] pstate: 20400085 (nzCv daIf +PAN -UAO) [ 0.005073] pc : __clk_put+0xe8/0x128 [ 0.005555] lr : clk_put+0xc/0x14 [ 0.005988] sp : ffffff80090b3ea0 [ 0.006422] x29: ffffff80090b3ea0 x28: 0000000040e20018 [ 0.007121] x27: ffffffc07bfff780 x26: 0000000000000001 [ 0.007819] x25: ffffff80090bda80 x24: ffffff8008ec5828 [ 0.008517] x23: ffffff80090bd000 x22: ffffff8008d8b2e8 [ 0.009216] x21: 0000000000000001 x20: fffffffffffffdfb [ 0.009914] x19: ffffff8009166180 x18: 00000000002bffa8 [ 0.010612] x17: ffffffc012996980 x16: 0000000000000000 [ 0.011311] x15: ffffffbf004a6800 x14: 3536343038393334 [ 0.012009] x13: 2079726576652073 x12: 7eb9c62c5c38f100 [ 0.012707] x11: ffffff80090b3ba0 x10: ffffff80090b3ba0 [ 0.013405] x9 : 0000000000000004 x8 : 0000000000000040 [ 0.014103] x7 : ffffffc079400270 x6 : 0000000000000000 [ 0.014801] x5 : ffffffc079400248 x4 : 0000000000000000 [ 0.015499] x3 : 0000000000000000 x2 : 0000000000000000 [ 0.016197] x1 : ffffff80091661c0 x0 : fffffffffffffdfb [ 0.016896] Call trace: [ 0.017218] __clk_put+0xe8/0x128 [ 0.017654] clk_put+0xc/0x14 [ 0.018048] timer_of_cleanup+0x60/0x7c [ 0.018551] mtk_syst_init+0x8c/0x9c [ 0.019020] timer_probe+0x6c/0xe0 [ 0.019469] time_init+0x14/0x44 [ 0.019893] start_kernel+0x2d0/0x46c [ 0.020378] ---[ end trace 8c1efabea1267649 ]--- [ 0.020982] ------------[ cut here ]------------ [ 0.021586] Trying to vfree() nonexistent vm area ((____ptrval____)) [ 0.022427] WARNING: CPU: 0 PID: 0 at __vunmap+0xd0/0xd8 [ 0.023119] Modules linked in: [ 0.023524] CPU: 0 PID: 0 Comm: swapper/0 Tainted: G W 4.19.67+ #1 [ 0.024498] Hardware name: MediaTek MT8183 (DT) [ 0.025091] pstate: 60400085 (nZCv daIf +PAN -UAO) [ 0.025718] pc : __vunmap+0xd0/0xd8 [ 0.026176] lr : __vunmap+0xd0/0xd8 [ 0.026632] sp : ffffff80090b3e90 [ 0.027066] x29: ffffff80090b3e90 x28: 0000000040e20018 [ 0.027764] x27: ffffffc07bfff780 x26: 0000000000000001 [ 0.028462] x25: ffffff80090bda80 x24: ffffff8008ec5828 [ 0.029160] x23: ffffff80090bd000 x22: ffffff8008d8b2e8 [ 0.029858] x21: 0000000000000000 x20: 0000000000000000 [ 0.030556] x19: ffffff800800d000 x18: 00000000002bffa8 [ 0.031254] x17: 0000000000000000 x16: 0000000000000000 [ 0.031952] x15: ffffffbf004a6800 x14: 3536343038393334 [ 0.032651] x13: 2079726576652073 x12: 7eb9c62c5c38f100 [ 0.033349] x11: ffffff80090b3b40 x10: ffffff80090b3b40 [ 0.034047] x9 : 0000000000000005 x8 : 5f5f6c6176727470 [ 0.034745] x7 : 5f5f5f5f28282061 x6 : ffffff80091c86ef [ 0.035443] x5 : ffffff800852b690 x4 : 0000000000000000 [ 0.036141] x3 : 0000000000000002 x2 : 0000000000000002 [ 0.036839] x1 : 7eb9c62c5c38f100 x0 : 7eb9c62c5c38f100 [ 0.037536] Call trace: [ 0.037859] __vunmap+0xd0/0xd8 [ 0.038271] vunmap+0x24/0x30 [ 0.038664] __iounmap+0x2c/0x34 [ 0.039088] timer_of_cleanup+0x70/0x7c [ 0.039591] mtk_syst_init+0x8c/0x9c [ 0.040060] timer_probe+0x6c/0xe0 [ 0.040507] time_init+0x14/0x44 [ 0.040932] start_kernel+0x2d0/0x46c This commit remove the calls to timer_of_cleanup when timer_of_init fails since it is unnecessary and actually cause warnings to be printed. Fixes: a0858f937960 ("mediatek: Convert the driver to timer-of") Signed-off-by: Fabien Parent <fparent@baylibre.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/linux-arm-kernel/20190919191315.25190-1-fparent@baylibre.com/
2019-09-19 21:13:15 +02:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: mtk: Fix race conditions in probe code We have two race conditions in the probe code which could lead to a null pointer dereference in the interrupt handler. The interrupt handler accesses the clockevent device, which may not yet be registered. First race condition happens when the interrupt handler gets registered before the interrupts get disabled. The second race condition happens when the interrupts get enabled, but the clockevent device is not yet registered. Fix that by disabling the interrupts before we register the interrupt and enable the interrupts after the clockevent device got registered. Reported-by: Gongbae Park <yongbae2@gmail.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-02-19 11:41:33 +01:00
clocksource/drivers/timer-mediatek: Convert the driver to timer-of Convert the driver to use the timer_of helpers. This allows to remove custom proprietary structure, factors out and simplifies the code. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:27 +08:00
clocksource: mtk: Fix race conditions in probe code We have two race conditions in the probe code which could lead to a null pointer dereference in the interrupt handler. The interrupt handler accesses the clockevent device, which may not yet be registered. First race condition happens when the interrupt handler gets registered before the interrupts get disabled. The second race condition happens when the interrupts get enabled, but the clockevent device is not yet registered. Fix that by disabling the interrupts before we register the interrupt and enable the interrupts after the clockevent device got registered. Reported-by: Gongbae Park <yongbae2@gmail.com> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Cc: stable@vger.kernel.org Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2015-02-19 11:41:33 +01:00
clocksource/drivers/mtk_timer: Convert init function to return error The init functions do not return any error. They behave as the following: - panic, thus leading to a kernel crash while another timer may work and make the system boot up correctly or - print an error and let the caller unaware if the state of the system Change that by converting the init functions to return an error conforming to the CLOCKSOURCE_OF_RET prototype. Proper error handling (rollback, errno value) will be changed later case by case, thus this change just return back an error or success in the init function. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
2016-05-31 17:43:47 +02:00
clocksource: Add support for the Mediatek SoCs This patch adds a clock source and clock event for the timer found on the Mediatek SoCs. The Mediatek General Purpose Timer block provides five 32 bit timers and one 64 bit timer. Two 32 bit timers are used by this driver: TIMER1: clock events supporting periodic and oneshot events TIMER2: clock source configured as a free running counter The General Purpose Timer block can be run with two clocks. A 13 MHz system clock and the RTC clock running at 32 KHz. This implementation uses the system clock with no clock source divider. The interrupts are shared between the different timers and have to be read back from a register. We just enable one interrupt for the clock event. The clock event timer is used by all cores. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2014-07-18 11:36:43 +02:00
clocksource/drivers/timer-mediatek: Use specific prefix for GPT Use specific prefix to specify the name of supported timer hardware: "General Purpose Timer (GPT)". Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:26 +08:00
clocksource/drivers/timer-mediatek: Add support for system timer This patch adds a new "System Timer" on the Mediatek SoCs. The System Timer is introduced as an always-on timer being clockevent device for tick-broadcasting. For clock, it is driven by 13 MHz system clock. The implementation uses the system clock with no clock source divider. For interrupt, the clock event timer can be used by all cores. Signed-off-by: Stanley Chu <stanley.chu@mediatek.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
2018-07-06 07:11:28 +08:00