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linux/drivers/counter/Kconfig

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treewide: Add SPDX license identifier - Makefile/Kconfig Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-19 13:07:45 +01:00
counter: Introduce the Generic Counter interface This patch introduces the Generic Counter interface for supporting counter devices. In the context of the Generic Counter interface, a counter is defined as a device that reports one or more "counts" based on the state changes of one or more "signals" as evaluated by a defined "count function." Driver callbacks should be provided to communicate with the device: to read and write various Signals and Counts, and to set and get the "action mode" and "count function" for various Synapses and Counts respectively. To support a counter device, a driver must first allocate the available Counter Signals via counter_signal structures. These Signals should be stored as an array and set to the signals array member of an allocated counter_device structure before the Counter is registered to the system. Counter Counts may be allocated via counter_count structures, and respective Counter Signal associations (Synapses) made via counter_synapse structures. Associated counter_synapse structures are stored as an array and set to the the synapses array member of the respective counter_count structure. These counter_count structures are set to the counts array member of an allocated counter_device structure before the Counter is registered to the system. A counter device is registered to the system by passing the respective initialized counter_device structure to the counter_register function; similarly, the counter_unregister function unregisters the respective Counter. The devm_counter_register and devm_counter_unregister functions serve as device memory-managed versions of the counter_register and counter_unregister functions respectively. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-02 15:30:36 +09:00
counter: i8254: Introduce the Intel 8254 interface library module Exposes consumer library functions providing support for interfaces compatible with the venerable Intel 8254 Programmable Interval Timer (PIT). The Intel 8254 PIT first appeared in the early 1980s and was used initially in IBM PC compatibles. The popularity of the original Intel 825x family of chips led to many subsequent variants and clones of the interface in various chips and integrated circuits. Although still popular, interfaces compatible with the Intel 8254 PIT are nowdays typically found embedded in larger VLSI processing chips and FPGA components rather than as discrete ICs. A CONFIG_I8254 Kconfig option is introduced by this patch. Modules wanting access to these i8254 library functions should select this Kconfig option, and import the I8254 symbol namespace. Link: https://lore.kernel.org/r/f6fe32c2db9525d816ab1a01f45abad56c081652.1681665189.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-04-16 13:36:53 -04:00
counter: Fix menuconfig "Counter support" submenu entries disappearance The current placement of the I8254 Kconfig entry results in the disappearance of the "Counter support" submenu items in menuconfig. Move the I8254 above the menuconfig COUNTER entry to restore the intended submenu behavior. Fixes: d428487471ba ("counter: i8254: Introduce the Intel 8254 interface library module") Reported-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Closes: https://lore.kernel.org/all/32ddaa7b-53a8-d61f-d526-b545bd561337@linux.intel.com/ Reviewed-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Reviewed-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20230620170159.556788-1-william.gray@linaro.org/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-06-20 13:01:59 -04:00
counter: 104-quad-8: Add Generic Counter interface support This patch adds support for the Generic Counter interface to the 104-QUAD-8 driver. The existing 104-QUAD-8 device interface should not be affected by this patch; all changes are intended as supplemental additions as perceived by the user. Generic Counter Counts are created for the eight quadrature channel counts, as well as their respective quadrature A and B Signals (which are associated via respective Synapse structures) and respective index Signals. The new Generic Counter interface sysfs attributes are intended to expose the same functionality and data available via the existing 104-QUAD-8 IIO device interface; the Generic Counter interface serves to provide the respective functionality and data in a standard way expected of counter devices. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-02 15:30:40 +09:00
counter: 104-quad-8: Add COMPILE_TEST depends 104_QUAD_8 depends on X86, but compiles fine on ARCH=arm. This patch adds support for COMPILE_TEST which is useful for compile testing code changes to the driver and Counter subsystem. Link: https://lore.kernel.org/r/20220105094137.259111-1-vilhelm.gray@gmail.com Cc: Syed Nayyar Waris <syednwaris@gmail.com> Suggested-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/3917721e792d362ee108b2f12cd2223675449d05.1647373009.git.vilhelm.gray@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-03-15 15:38:52 -04:00
counter: add HAS_IOPORT_MAP dependency The 104_QUAD_8 counter driver uses devm_ioport_map() without depending on HAS_IOPORT_MAP. This means the driver is not usable on platforms such as s390 which do not support I/O port mapping. Add the missing HAS_IOPORT_MAP dependency to make this explicit. Co-developed-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Arnd Bergmann <arnd@kernel.org> Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com> Link: https://lore.kernel.org/r/20230522105049.1467313-8-schnelle@linux.ibm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-05-22 12:50:12 +02:00
counter: 104-quad-8: Add Generic Counter interface support This patch adds support for the Generic Counter interface to the 104-QUAD-8 driver. The existing 104-QUAD-8 device interface should not be affected by this patch; all changes are intended as supplemental additions as perceived by the user. Generic Counter Counts are created for the eight quadrature channel counts, as well as their respective quadrature A and B Signals (which are associated via respective Synapse structures) and respective index Signals. The new Generic Counter interface sysfs attributes are intended to expose the same functionality and data available via the existing 104-QUAD-8 IIO device interface; the Generic Counter interface serves to provide the respective functionality and data in a standard way expected of counter devices. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-02 15:30:40 +09:00
counter: 104-quad-8: Migrate to the regmap API The regmap API supports IO port accessors so we can take advantage of regmap abstractions rather than handling access to the device registers directly in the driver. With regmap we get boundary checks, read-write permissions, operation synchronization locks, and more for free. Most important of all, rather than rolling our own we utilize implementations that are known to work and gain from any future improvements and fixes that come. Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/1f1f7920d2be94aedb6fdf49f429fe6137c8cb24.1681753140.git.william.gray@linaro.org/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-04-17 15:50:50 -04:00
counter: 104-quad-8: Add Generic Counter interface support This patch adds support for the Generic Counter interface to the 104-QUAD-8 driver. The existing 104-QUAD-8 device interface should not be affected by this patch; all changes are intended as supplemental additions as perceived by the user. Generic Counter Counts are created for the eight quadrature channel counts, as well as their respective quadrature A and B Signals (which are associated via respective Synapse structures) and respective index Signals. The new Generic Counter interface sysfs attributes are intended to expose the same functionality and data available via the existing 104-QUAD-8 IIO device interface; the Generic Counter interface serves to provide the respective functionality and data in a standard way expected of counter devices. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-02 15:30:40 +09:00
counter: 104-quad-8: Remove reference in Kconfig to 25-bit counter value Support for 25-bit counter values was removed in commit 4aa3b75c7460 ("counter: 104-quad-8: Fix race condition between FLAG and CNTR reads"). Adjust the Kconfig description of CONFIG_104_QUAD_8 to remove reference of 25-bit counter values. Link: https://lore.kernel.org/r/20230410134516.102886-1-william.gray@linaro.org/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-04-10 09:45:16 -04:00
counter: 104-quad-8: Add Generic Counter interface support This patch adds support for the Generic Counter interface to the 104-QUAD-8 driver. The existing 104-QUAD-8 device interface should not be affected by this patch; all changes are intended as supplemental additions as perceived by the user. Generic Counter Counts are created for the eight quadrature channel counts, as well as their respective quadrature A and B Signals (which are associated via respective Synapse structures) and respective index Signals. The new Generic Counter interface sysfs attributes are intended to expose the same functionality and data available via the existing 104-QUAD-8 IIO device interface; the Generic Counter interface serves to provide the respective functionality and data in a standard way expected of counter devices. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-02 15:30:40 +09:00
counter: 104-quad-8: Add IRQ support for the ACCES 104-QUAD-8 The LSI/CSI LS7266R1 chip provides programmable output via the FLG pins. When interrupts are enabled on the ACCES 104-QUAD-8, they occur whenever FLG1 is active. Four functions are available for the FLG1 signal: Carry, Compare, Carry-Borrow, and Index. Carry: Interrupt generated on active low Carry signal. Carry signal toggles every time the respective channel's counter overflows. Compare: Interrupt generated on active low Compare signal. Compare signal toggles every time respective channel's preset register is equal to the respective channel's counter. Carry-Borrow: Interrupt generated on active low Carry signal and active low Borrow signal. Carry signal toggles every time the respective channel's counter overflows. Borrow signal toggles every time the respective channel's counter underflows. Index: Interrupt generated on active high Index signal. These four functions correspond respectivefly to the following four Counter event types: COUNTER_EVENT_OVERFLOW, COUNTER_EVENT_THRESHOLD, COUNTER_EVENT_OVERFLOW_UNDERFLOW, and COUNTER_EVENT_INDEX. Interrupts push Counter events to event channel X, where 'X' is the respective channel whose FLG1 activated. This patch adds IRQ support for the ACCES 104-QUAD-8. The interrupt line numbers for the devices may be configured via the irq array module parameter. Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/e3a28e100840e3a336fa93fce77445f0e9d9a674.1632884256.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-09-29 12:16:06 +09:00
counter: 104-quad-8: Add Generic Counter interface support This patch adds support for the Generic Counter interface to the 104-QUAD-8 driver. The existing 104-QUAD-8 device interface should not be affected by this patch; all changes are intended as supplemental additions as perceived by the user. Generic Counter Counts are created for the eight quadrature channel counts, as well as their respective quadrature A and B Signals (which are associated via respective Synapse structures) and respective index Signals. The new Generic Counter interface sysfs attributes are intended to expose the same functionality and data available via the existing 104-QUAD-8 IIO device interface; the Generic Counter interface serves to provide the respective functionality and data in a standard way expected of counter devices. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-02 15:30:40 +09:00
counter: add FlexTimer Module Quadrature decoder counter driver This driver exposes the counter for the quadrature decoder of the FlexTimer Module, present in the LS1021A soc. Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-02 15:30:51 +09:00
counter: ftm-quaddec: Depend on the Layerscape SoC At the moment only the Freescale LS1021A is the only HW that supports this IP block so add an appropriate dependency and compile test. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-3-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-08 07:47:49 +00:00
counter/ftm-quaddec: Add missing dependencies in Kconfig This driver uses devm_ioremap and of* functions. This fixes a linking failure with e.g. ARCH=um. Reported-by: kbuild test robot <lkp@intel.com> Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com> Fixes: a3b9a99 ("counter: add FlexTimer Module Quadrature decoder counter driver") Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2019-06-04 16:03:26 +02:00
counter: add FlexTimer Module Quadrature decoder counter driver This driver exposes the counter for the quadrature decoder of the FlexTimer Module, present in the LS1021A soc. Signed-off-by: Patrick Havelange <patrick.havelange@essensium.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-02 15:30:51 +09:00
counter: Sort the Kconfig entries alphabetically Sort the Kconfig menu alphabetically to make it easier to read as the list grows larger. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-1-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-08 07:47:47 +00:00
counter: intel-qep: Depend on X86 Limit the Intel counter driver to X86, it doesn't make sense to build it for all arches if the counter subsystem is enabled. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-2-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-08 07:47:48 +00:00
counter: Sort the Kconfig entries alphabetically Sort the Kconfig menu alphabetically to make it easier to read as the list grows larger. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-1-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-08 07:47:47 +00:00
counter: Add microchip TCB capture counter This drivers allows to use the capture mode of the Timer Counter Block hardware block available in Microchip SoCs through the counter subsystem. Two functions of the counter are supported for the moment: period capture and quadrature decoder. The latter is only supported by the SAMA5 series of SoCs. For the period capture mode a basic setup has been chosen that will reset the counter each time the period is actually reached. Of course the device offers much more possibilities. For quadrature mode, both channel 0 and 1 must be configured even if we only capture the position (no revolution/rotation). Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2020-07-06 13:43:47 +02:00
counter: fix dependency references for config MICROCHIP_TCB_CAPTURE Commit dfeef15e73ca ("counter: microchip-tcp-capture: Add appropriate arch deps for TCP driver") intends to add appropriate dependencies for the config MICROCHIP_TCB_CAPTURE. It however prefixes the intended configs with CONFIG, but in Kconfig files in contrast to source files, the configs are referenced to without prefixing them with CONFIG. Fix the dependency references due to this minor misconception. Fixes: dfeef15e73ca ("counter: microchip-tcp-capture: Add appropriate arch deps for TCP driver") Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Link: https://lore.kernel.org/r/20230118074659.5909-1-lukas.bulwahn@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-18 08:46:59 +01:00
counter: Add microchip TCB capture counter This drivers allows to use the capture mode of the Timer Counter Block hardware block available in Microchip SoCs through the counter subsystem. Two functions of the counter are supported for the moment: period capture and quadrature decoder. The latter is only supported by the SAMA5 series of SoCs. For the period capture mode a basic setup has been chosen that will reset the counter each time the period is actually reached. Of course the device offers much more possibilities. For quadrature mode, both channel 0 and 1 must be configured even if we only capture the position (no revolution/rotation). Signed-off-by: Kamel Bouhara <kamel.bouhara@bootlin.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2020-07-06 13:43:47 +02:00
counter: Add Renesas RZ/G2L MTU3a counter driver Add RZ/G2L MTU3a counter driver. This IP supports the following phase counting modes on MTU1 and MTU2 channels 1) 16-bit phase counting modes on MTU1 and MTU2 channels. 2) 32-bit phase counting mode by cascading MTU1 and MTU2 channels. This patch adds 3 counter value channels. count0: 16-bit phase counter value channel on MTU1 count1: 16-bit phase counter value channel on MTU2 count2: 32-bit phase counter value channel by cascading MTU1 and MTU2 channels. The external input phase clock pin for the counter value channels are as follows: count0: "MTCLKA-MTCLKB" count1: "MTCLKA-MTCLKB" or "MTCLKC-MTCLKD" count2: "MTCLKA-MTCLKB" or "MTCLKC-MTCLKD" Use the sysfs variable "external_input_phase_clock_select" to select the external input phase clock pin and "cascade_counts_enable" to enable/ disable cascading of channels. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: William Breathitt Gray <william.gray@linaro.org> Acked-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230330111632.169434-5-biju.das.jz@bp.renesas.com
2023-03-30 12:16:30 +01:00
mfd: rz-mtu3: Link time dependencies The new set of drivers for RZ/G2L MTU3a tries to enable compile-testing the individual client drivers even when the MFD portion is disabled but gets it wrong, causing a link failure when the core is in a loadable module but the other drivers are built-in: x86_64-linux-ld: drivers/pwm/pwm-rz-mtu3.o: in function `rz_mtu3_pwm_apply': pwm-rz-mtu3.c:(.text+0x4bf): undefined reference to `rz_mtu3_8bit_ch_write' x86_64-linux-ld: pwm-rz-mtu3.c:(.text+0x509): undefined reference to `rz_mtu3_disable' arm-linux-gnueabi-ld: drivers/counter/rz-mtu3-cnt.o: in function `rz_mtu3_cascade_counts_enable_get': rz-mtu3-cnt.c:(.text+0xbec): undefined reference to `rz_mtu3_shared_reg_read' It seems better not to add the extra complexity here but instead just use a normal hard dependency, so remove the #else portion in the header along with the "|| COMPILE_TEST". This could also be fixed by having slightly more elaborate Kconfig dependencies or using the cursed 'IS_REACHABLE()' helper, but in practice it's already possible to compile-test all these drivers by enabling the mtd portion. Fixes: 254d3a727421c ("pwm: Add Renesas RZ/G2L MTU3a PWM driver") Fixes: 0be8907359df4 ("counter: Add Renesas RZ/G2L MTU3a counter driver") Fixes: 654c293e1687b ("mfd: Add Renesas RZ/G2L MTU3a core driver") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thierry Reding <thierry.reding@gmail.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20230719090430.1925182-1-arnd@kernel.org Signed-off-by: Lee Jones <lee@kernel.org>
2023-07-19 11:02:23 +02:00
counter: Add Renesas RZ/G2L MTU3a counter driver Add RZ/G2L MTU3a counter driver. This IP supports the following phase counting modes on MTU1 and MTU2 channels 1) 16-bit phase counting modes on MTU1 and MTU2 channels. 2) 32-bit phase counting mode by cascading MTU1 and MTU2 channels. This patch adds 3 counter value channels. count0: 16-bit phase counter value channel on MTU1 count1: 16-bit phase counter value channel on MTU2 count2: 32-bit phase counter value channel by cascading MTU1 and MTU2 channels. The external input phase clock pin for the counter value channels are as follows: count0: "MTCLKA-MTCLKB" count1: "MTCLKA-MTCLKB" or "MTCLKC-MTCLKD" count2: "MTCLKA-MTCLKB" or "MTCLKC-MTCLKD" Use the sysfs variable "external_input_phase_clock_select" to select the external input phase clock pin and "cascade_counts_enable" to enable/ disable cascading of channels. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: William Breathitt Gray <william.gray@linaro.org> Acked-by: William Breathitt Gray <william.gray@linaro.org> Signed-off-by: Lee Jones <lee@kernel.org> Link: https://lore.kernel.org/r/20230330111632.169434-5-biju.das.jz@bp.renesas.com
2023-03-30 12:16:30 +01:00
counter: Sort the Kconfig entries alphabetically Sort the Kconfig menu alphabetically to make it easier to read as the list grows larger. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-1-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-08 07:47:47 +00:00
counter: Add support for Intel Quadrature Encoder Peripheral Add support for Intel Quadrature Encoder Peripheral found on Intel Elkhart Lake platform. Initial implementation was done by Felipe Balbi while he was working at Intel with later changes from Raymond Tan and me. Co-developed-by: Felipe Balbi (Intel) <balbi@kernel.org> Signed-off-by: Felipe Balbi (Intel) <balbi@kernel.org> Co-developed-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20210602113259.158674-1-jarkko.nikula@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-02 14:32:59 +03:00
counter: Sort the Kconfig entries alphabetically Sort the Kconfig menu alphabetically to make it easier to read as the list grows larger. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-1-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-08 07:47:47 +00:00
counter: Add support for Intel Quadrature Encoder Peripheral Add support for Intel Quadrature Encoder Peripheral found on Intel Elkhart Lake platform. Initial implementation was done by Felipe Balbi while he was working at Intel with later changes from Raymond Tan and me. Co-developed-by: Felipe Balbi (Intel) <balbi@kernel.org> Signed-off-by: Felipe Balbi (Intel) <balbi@kernel.org> Co-developed-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20210602113259.158674-1-jarkko.nikula@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-02 14:32:59 +03:00
counter: Sort the Kconfig entries alphabetically Sort the Kconfig menu alphabetically to make it easier to read as the list grows larger. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-1-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-08 07:47:47 +00:00
counter: Add support for Intel Quadrature Encoder Peripheral Add support for Intel Quadrature Encoder Peripheral found on Intel Elkhart Lake platform. Initial implementation was done by Felipe Balbi while he was working at Intel with later changes from Raymond Tan and me. Co-developed-by: Felipe Balbi (Intel) <balbi@kernel.org> Signed-off-by: Felipe Balbi (Intel) <balbi@kernel.org> Co-developed-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20210602113259.158674-1-jarkko.nikula@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-02 14:32:59 +03:00
counter: ti-ecap-capture: capture driver support for ECAP ECAP hardware on TI AM62x SoC supports capture feature. It can be used to timestamp events (falling/rising edges) detected on input signal. This commit adds capture driver support for ECAP hardware on AM62x SoC. In the ECAP hardware, capture pin can also be configured to be in PWM mode. Current implementation only supports capture operating mode. Hardware also supports timebase sync between multiple instances, but this driver supports simple independent capture functionality. Signed-off-by: Julien Panis <jpanis@baylibre.com> Link: https://lore.kernel.org/r/20220923142437.271328-4-jpanis@baylibre.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org> Link: https://lore.kernel.org/r/25644ce1f2fd15d116977770ede20e024f658513.1664318353.git.william.gray@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-09-27 18:53:45 -04:00
counter: Sort the Kconfig entries alphabetically Sort the Kconfig menu alphabetically to make it easier to read as the list grows larger. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-1-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-08 07:47:47 +00:00
counter: ti-eqep: Allow eQEP driver to be built for K3 devices TI K3 SoC's support eQEP hardware, so add ARCH_K3 to the depends so the TI eQEP driver can be built for K3 devices. Signed-off-by: Judith Mendez <jm@ti.com> Reviewed-by: David Lechner <david@lechnology.com> Link: https://lore.kernel.org/r/20240612135538.2447938-9-jm@ti.com Signed-off-by: William Breathitt Gray <wbg@kernel.org>
2024-06-12 08:55:38 -05:00
counter: Sort the Kconfig entries alphabetically Sort the Kconfig menu alphabetically to make it easier to read as the list grows larger. Signed-off-by: Peter Robinson <pbrobinson@gmail.com> Link: https://lore.kernel.org/r/20230108074750.443705-1-pbrobinson@gmail.com/ Signed-off-by: William Breathitt Gray <william.gray@linaro.org>
2023-01-08 07:47:47 +00:00
counter: 104-quad-8: Add Generic Counter interface support This patch adds support for the Generic Counter interface to the 104-QUAD-8 driver. The existing 104-QUAD-8 device interface should not be affected by this patch; all changes are intended as supplemental additions as perceived by the user. Generic Counter Counts are created for the eight quadrature channel counts, as well as their respective quadrature A and B Signals (which are associated via respective Synapse structures) and respective index Signals. The new Generic Counter interface sysfs attributes are intended to expose the same functionality and data available via the existing 104-QUAD-8 IIO device interface; the Generic Counter interface serves to provide the respective functionality and data in a standard way expected of counter devices. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-04-02 15:30:40 +09:00