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linux/include/acpi/actbl2.h

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ACPICA: adding SPDX headers Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-03-14 16:13:07 -07:00
ACPICA: Update all ACPICA copyrights and signons to 2010 Add 2010 copyright to all module headers and signons, including the Linux header. This affects virtually every file in the ACPICA core subsystem, iASL compiler, and all utilities. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-01-22 19:07:36 +08:00
ACPICA: Drop stale comment about the header file content ACPICA commit 48e7c4cd893270dab8d05e6d75fbf23d0fcbb267 Commit a025731aec31 ("Restructure ACPI table files") restructed the header files and moved lots of tables that are in the ACPI specification to actbl2.h(e.g.: APIC/MADT, PCCT, PPTT, ..etc). This restructure made the comment stating this header file contains tables that are not in the ACPI specification incorrect. From that commit onwards it has remained as stale. Let us get rid of it as it might be misleading. Link: https://github.com/acpica/acpica/commit/48e7c4cd Reported-by: Sahil Kaushal <sahil.kaushal@arm.com> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/6168200.lOV4Wx5bFT@rjwysocki.net
2025-04-25 21:20:21 +02:00
ACPICA: Update all ACPICA copyrights and signons to 2010 Add 2010 copyright to all module headers and signons, including the Linux header. This affects virtually every file in the ACPICA core subsystem, iASL compiler, and all utilities. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-01-22 19:07:36 +08:00
ACPICA: Update the copyright year to 2026 Update copyright notices in all ACPICA files. Link: https://github.com/acpica/acpica/commit/9def02549a9c Signed-off-by: Pawel Chmielewski <pawel.chmielewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/4379132.1IzOArtZ34@rafael.j.wysocki
2026-05-27 20:08:02 +02:00
ACPICA: Update all ACPICA copyrights and signons to 2010 Add 2010 copyright to all module headers and signons, including the Linux header. This affects virtually every file in the ACPICA core subsystem, iASL compiler, and all utilities. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-01-22 19:07:36 +08:00
ACPICA: adding SPDX headers Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-03-14 16:13:07 -07:00
ACPICA: Update all ACPICA copyrights and signons to 2010 Add 2010 copyright to all module headers and signons, including the Linux header. This affects virtually every file in the ACPICA core subsystem, iASL compiler, and all utilities. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-01-22 19:07:36 +08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00
ACPICA: iASL: Add suppport for AGDI table ACPICA commit cf36a6d658ca5aa8c329c2edfc3322c095ffd844 Add support for Arm Generic Diagnostic Dump and Reset Interface, which is described by "ACPI for Arm Components 1.1 Platform Design Document" ARM DEN0093. Add the necessary types in the ACPICA header files and support for compiling and decompiling the table. Link: https://github.com/acpica/acpica/commit/cf36a6d6 Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-22 17:37:21 +01:00
ACPICA: Add support for ARM Performance Monitoring Unit Table. ACPICA commit 002165ecc0a3dc703bb24c789aaa02fdada01675 The specification of this table is described in "ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document" ARM DEN0117. This patch adds the necessary types and support for compiling/disassembling APMT. Link: https://github.com/acpica/acpica/commit/002165ec Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 20:58:04 +02:00
ACPICA: iASL: Add support for the BDAT ACPI table ACPICA commit 81eb9c383e6dee0f1b6620e91e5c3dbb48234831 Includes: Table compiler, disassembler, and template generator. Link: https://github.com/acpica/acpica/commit/81eb9c38 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:26:03 -07:00
ACPICA: iASL: Add CCEL table to both compiler/disassembler ACPICA commit 10e4763f155eac0c60295a7e364b0316fc52c4f1 Link: https://github.com/acpica/acpica/commit/10e4763f Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-27 19:51:51 +02:00
ACPICA: Finish support for the CDAT table ACPICA commit 8ac4e5116f59d6f9ba2fbeb9ce22ab58237a278f Finish support for the CDAT table, in both the data table compiler and the disassembler. Link: https://github.com/acpica/acpica/commit/8ac4e511 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-27 19:58:36 +02:00
ACPICA: actbl2.h: ERDT: Add typedef and other definitions ACPICA commit dddd9270531d74af523afa68515d8aae6a18bbe0 The ERDT table (and its many subtables) enumerate capabilities and methods for Intel Resource Director Technology to monitor and control L3 cache allocation and memory bandwidth by CPU cores and IO devices. Structure defined in the Intel Resource Director Technology (RDT) Architecture specification downloadable from www.intel.com/sdm Link: https://github.com/acpica/acpica/commit/dddd9270 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3296755.5fSG56mABF@rjwysocki.net
2025-04-25 21:27:24 +02:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: iASL: Add definitions for the IOVT table Add definitions for the IOVT table and its subtables. Link: https://github.com/acpica/acpica/commit/14c0def532ac Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2031013.PYKUYFuaPT@rafael.j.wysocki
2026-01-14 13:22:50 +01:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Add KEYP table definition Software uses this table to discover the base address of the Key Configuration Unit (KCU) register block associated with each IDE capable host bridge. [1]: Root Complex IDE Key Configuration Unit Software Programming Guide https://cdrdv2.intel.com/v1/dl/getContent/732838 Link: https://github.com/acpica/acpica/commit/af970172e2dd Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3401908.44csPzL39Z@rafael.j.wysocki
2026-01-14 13:21:05 +01:00
ACPICA: Add support for LPIT table. Adds header, disassembler, table compiler, and template support for the Low Power Idle Table (LPIT). Note that the disassembler and table compiler are not shipped in the kernel. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-04-30 10:04:06 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00
ACPICA: Add support for MCHI table Disassembler and header file support for MCHI - Managment Controller Host Interface table. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-03-03 16:30:35 +08:00
ACPICA: Add support for Arm's MPAM ACPI table version 2 ACPICA commit 005e24bcaa6e4c7db327b4f81fb63b2715aac7e6 Complies with ACPI for Memory System Resource Partitioning and Monitoring 2.0 [1]. Document number: DEN0065, as of December 2022. Support for all types of MPAM resources. No support yet for: 1) MPAM PCC Interface Type 2) The optional Resource-specific data per MSC node, introduced in v2 of the MPAM ACPI spec. [1] https://developer.arm.com/documentation/den0065/latest Link: https://github.com/acpica/acpica/commit/005e24bc Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:37:35 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: actbl2.h: MRRM: Add typedef and other definitions ACPICA commit 04fd53b2647b9f6f98cfca551383689cb3b59362 The MRRM table describes association between physical address ranges and "region numbers". Structure defined in the Intel Resource Director Technology (RDT) Architecture specification downloadable from www.intel.com/sdm Link: https://github.com/acpica/acpica/commit/04fd53b2 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3372188.44csPzL39Z@rjwysocki.net
2025-04-25 21:24:02 +02:00
ACPICA: iASL: Add support for MSDM ACPI table. ACPICA commit a2c590ce9bff850e3abf4fd430cede860a3cb1fa This is the Microsoft Data Management table. MSDM table is not used in the Linux kernel. Link: https://github.com/acpica/acpica/commit/a2c590ce Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-04-13 11:51:08 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: add support for PHAT table ACPICA commit de805b6a355c01f3aff4044a4ba60e9845b7668c This table displays health information about the platform firmware. For full definition, see the ACPI specification. Link: https://github.com/acpica/acpica/commit/de805b6a Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:23 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: iASL: add disassembler support for PRMT ACPICA commit f70e7593e37c9e29f19be8ad3ef93f3f34799368 Link: https://github.com/acpica/acpica/commit/f70e7593 Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:26:06 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.5: RAS2: Add support for RAS2 table ACPICA commit c581606cf49b7574d29c02b1a3bc144650375e32 Add support for ACPI RAS2 feature table(RAS2) defined in the ACPI 6.5 Specification & upwards revision, section 5.2.21. The RAS2 table provides interfaces for platform RAS features. RAS2 offers the same services as RASF, but is more scalable than the latter. RAS2 supports independent RAS controls and capabilities for a given RAS feature for multiple instances of the same component in a given system. The platform can support either RAS2 or RASF but not both. Link: https://github.com/acpica/acpica/commit/c581606c Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-09-27 17:41:52 +01:00
ACPICA: iASL Table Compiler: Add full support for RGRT ACPI table ACPICA commit 6949e1dd2d92788a994ce657857fe8809159e71e Includes compiler, disassembler, and template generator. Link: https://github.com/acpica/acpica/commit/6949e1dd Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:26:00 -07:00
ACPICA: Add structure definitions for RISC-V RHCT ACPICA commit 82afd0434e79f74b96a6be88115ddc8343a1ba40 RISC-V Hart Capabilities Table (RHCT) is a new static table. The ECR to add RHCT is approved by the UEFI forum and will be available in the next version of the ACPI spec. Link: https://github.com/acpica/acpica/commit/82afd043 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:40:57 +02:00
ACPICA: actbl2: Add definitions for RIMT ACPICA commit 73c32bc89cad64ab19c1231a202361e917e6823c RISC-V IO Mapping Table (RIMT) is a new static table defined for RISC-V to communicate IOMMU information to the OS. The specification for RIMT is available at [1]. Add structure definitions for RIMT. Link: https://github.com/riscv-non-isa/riscv-acpi-rimt [1] Link: https://github.com/acpica/acpica/commit/73c32bc8 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/10665648.nUPlyArG6x@rjwysocki.net
2025-04-25 21:24:41 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: iASL: Add support for the SDEI table ACPICA commit 5ad4f0b7bf9e7ba175bd320cf7950f3b38799ff3 ACPI 6.2 adds support for the Software Delegated Exception Interface, which is described by "Software Delegated Exception Interface (SDEI)" ARM DEN0054A. Add the necessary types in the ACPICA header files and support for compiling/decompiling the table. Link: https://github.com/acpica/acpica/commit/5ad4f0b7 Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-08-03 14:26:25 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Add SVKL table headers ACPICA commit b5e6bcf69dbb9877481992d5ce86008cfb94f5b8 SVKL (Storage Volume Key Location Table) is used by BIOS/Firmware to share storage volume encryption key's with OS. It will be used by userspace to decrypt and mount encrypted drives. So add SVKL table signature and add it to known signatures array support SVKL. You can find details about the SVKL table in TDX specfication titled "Guest-Host-Communication Interface (GHCI) for Intel Trust Domain Extensions (Intel® TDX)", sec 4.4 and in ACPI specification r6.4, sec 5.2.6. Link: https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-guest-hypervisor-communication-interface.pdf Link: https://github.com/acpica/acpica/commit/b5e6bcf6 Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:25:56 -07:00
ACPICA: Add SoundWire File Table (SWFT) signature The File Download (FDL) process of SoundWire Class Audio (SDCA) driver, which provides code/data which may be required by an SDCA device, utilizes SWFT to obtain that code/data. There is a single SWFT for the system, and SWFT can contain multiple files (information about the file as well as its binary contents). The SWFT has a standard ACPI Descriptor Table Header, followed by SoundWire File definitions as described in Discovery and Configuration (DisCo) Specification for SoundWire® Link: https://github.com/acpica/acpica/commit/18c96022 Signed-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20250811134505.1162661-1-mstrozek@opensource.cirrus.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-08-11 14:45:05 +01:00
ACPICA: iASL: Add TDEL table to both compiler/disassembler ACPICA commit 403f9965aba7ff9d2ed5b41bbffdd2a1ed0f596f Added struct acpi_pcc_info to acpi_src. Link: https://github.com/acpica/acpica/commit/403f9965 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-22 17:36:30 +01:00
ACPICA: Add signatures for undefined tables: ATKG, GSCI, IEIT These ACPI tables have been seen in the field, but the actual table definitions are unkown at this time. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-05-31 09:22:12 +08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00
ACPICA: Add support for complex _PLD buffers. _PLD (Physical Location of Device) returns a bit-packed buffer that is difficult to parse. This change adds a new interface, AcpiDecodePldBuffer that parses the buffer into a more usable local struct. Also adds macros to both get and set individual fields within the packed _PLD buffer. Adds a new include file, acbuffer.h - which will be expanded to add structs for other ACPI names that return buffers. ACPICA BZ 954. Emit (in comments) the decoded contents of a static _PLD buffer in order to improve comprehension of this bit-packed buffer. Add multi-endian support to the _PLD decode routine. Deploy the multi-endian macros to extract data from the _PLD buffer. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Feng Tang <feng.tang@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-08-17 13:07:54 +08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00
ACPICA: iASL: Add support for the AEST table (data compiler) Includes support in the table compiler and the disassembler. ACPICA commit e75074d84d1207339a048486c2d06ecb935d0092 Link: https://github.com/acpica/acpica/commit/e75074d8 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-03 20:07:53 +02:00
ACPICA: AEST: Add support for the AEST V2 table ACPICA commit ebb49799c78891cbe370f1264844664a3d8b6f35 AEST V2 was published[1], add V2 support based on AEST V1. [1]: https://developer.arm.com/documentation/den0085/latest/ Link: https://github.com/acpica/acpica/commit/ebb4979 Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-25 17:34:26 +08:00
ACPICA: iASL: Add support for the AEST table (data compiler) Includes support in the table compiler and the disassembler. ACPICA commit e75074d84d1207339a048486c2d06ecb935d0092 Link: https://github.com/acpica/acpica/commit/e75074d8 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-03 20:07:53 +02:00
ACPICA: AEST: Add support for the AEST V2 table ACPICA commit ebb49799c78891cbe370f1264844664a3d8b6f35 AEST V2 was published[1], add V2 support based on AEST V1. [1]: https://developer.arm.com/documentation/den0085/latest/ Link: https://github.com/acpica/acpica/commit/ebb4979 Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-25 17:34:26 +08:00
ACPICA: iASL: Add support for the AEST table (data compiler) Includes support in the table compiler and the disassembler. ACPICA commit e75074d84d1207339a048486c2d06ecb935d0092 Link: https://github.com/acpica/acpica/commit/e75074d8 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-03 20:07:53 +02:00
ACPICA: Fix AEST Processor generic resource substructure data field byte length ACPICA commit 13b9327761955f6e1e5dbf748b3112940c0dc539 The byte length of the Data field in the AEST Processor generic resource substructure defined in ACPI for the Armv8 RAS Extensions 1.1 is 4Byte. However, it is defined as a pointer type, and on a 64-bit machine, it is interpreted as 8 bytes. Therefore, it is changed from a pointer type unsigned integer 1 byte to an unsigned integer 4 bytes. Link: https://github.com/acpica/acpica/commit/13b93277 Signed-off-by: Shuuichirou Ishii <ishii.shuuichir@fujitsu.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-22 17:28:34 +01:00
ACPICA: iASL: Add support for the AEST table (data compiler) Includes support in the table compiler and the disassembler. ACPICA commit e75074d84d1207339a048486c2d06ecb935d0092 Link: https://github.com/acpica/acpica/commit/e75074d8 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-03 20:07:53 +02:00
ACPICA: AEST: Add support for the AEST V2 table ACPICA commit ebb49799c78891cbe370f1264844664a3d8b6f35 AEST V2 was published[1], add V2 support based on AEST V1. [1]: https://developer.arm.com/documentation/den0085/latest/ Link: https://github.com/acpica/acpica/commit/ebb4979 Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-25 17:34:26 +08:00
ACPICA: iASL: Add support for the AEST table (data compiler) Includes support in the table compiler and the disassembler. ACPICA commit e75074d84d1207339a048486c2d06ecb935d0092 Link: https://github.com/acpica/acpica/commit/e75074d8 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-03 20:07:53 +02:00
ACPICA: AEST: Add support for the AEST V2 table ACPICA commit ebb49799c78891cbe370f1264844664a3d8b6f35 AEST V2 was published[1], add V2 support based on AEST V1. [1]: https://developer.arm.com/documentation/den0085/latest/ Link: https://github.com/acpica/acpica/commit/ebb4979 Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-25 17:34:26 +08:00
ACPICA: iASL: Add support for the AEST table (data compiler) Includes support in the table compiler and the disassembler. ACPICA commit e75074d84d1207339a048486c2d06ecb935d0092 Link: https://github.com/acpica/acpica/commit/e75074d8 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-03 20:07:53 +02:00
ACPICA: AEST: Add support for the AEST V2 table ACPICA commit ebb49799c78891cbe370f1264844664a3d8b6f35 AEST V2 was published[1], add V2 support based on AEST V1. [1]: https://developer.arm.com/documentation/den0085/latest/ Link: https://github.com/acpica/acpica/commit/ebb4979 Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-25 17:34:26 +08:00
ACPICA: iASL: Add support for the AEST table (data compiler) Includes support in the table compiler and the disassembler. ACPICA commit e75074d84d1207339a048486c2d06ecb935d0092 Link: https://github.com/acpica/acpica/commit/e75074d8 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-03 20:07:53 +02:00
ACPICA: AEST: Add support for the AEST V2 table ACPICA commit ebb49799c78891cbe370f1264844664a3d8b6f35 AEST V2 was published[1], add V2 support based on AEST V1. [1]: https://developer.arm.com/documentation/den0085/latest/ Link: https://github.com/acpica/acpica/commit/ebb4979 Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-25 17:34:26 +08:00
ACPICA: iASL: Add support for the AEST table (data compiler) Includes support in the table compiler and the disassembler. ACPICA commit e75074d84d1207339a048486c2d06ecb935d0092 Link: https://github.com/acpica/acpica/commit/e75074d8 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-03 20:07:53 +02:00
ACPICA: AEST: Add support for the AEST V2 table ACPICA commit ebb49799c78891cbe370f1264844664a3d8b6f35 AEST V2 was published[1], add V2 support based on AEST V1. [1]: https://developer.arm.com/documentation/den0085/latest/ Link: https://github.com/acpica/acpica/commit/ebb4979 Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-04-25 17:34:26 +08:00
ACPICA: iASL: Add support for the AEST table (data compiler) Includes support in the table compiler and the disassembler. ACPICA commit e75074d84d1207339a048486c2d06ecb935d0092 Link: https://github.com/acpica/acpica/commit/e75074d8 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-03 20:07:53 +02:00
ACPICA: iASL: Add suppport for AGDI table ACPICA commit cf36a6d658ca5aa8c329c2edfc3322c095ffd844 Add support for Arm Generic Diagnostic Dump and Reset Interface, which is described by "ACPI for Arm Components 1.1 Platform Design Document" ARM DEN0093. Add the necessary types in the ACPICA header files and support for compiling and decompiling the table. Link: https://github.com/acpica/acpica/commit/cf36a6d6 Signed-off-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-22 17:37:21 +01:00
ACPICA: Add support for ARM Performance Monitoring Unit Table. ACPICA commit 002165ecc0a3dc703bb24c789aaa02fdada01675 The specification of this table is described in "ARM Performance Monitoring Unit Architecture 1.0 Platform Design Document" ARM DEN0117. This patch adds the necessary types and support for compiling/disassembling APMT. Link: https://github.com/acpica/acpica/commit/002165ec Signed-off-by: Besar Wicaksono <bwicaksono@nvidia.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 20:58:04 +02:00
ACPICA: iASL: Add support for the BDAT ACPI table ACPICA commit 81eb9c383e6dee0f1b6620e91e5c3dbb48234831 Includes: Table compiler, disassembler, and template generator. Link: https://github.com/acpica/acpica/commit/81eb9c38 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:26:03 -07:00
ACPICA: iASL: Add CCEL table to both compiler/disassembler ACPICA commit 10e4763f155eac0c60295a7e364b0316fc52c4f1 Link: https://github.com/acpica/acpica/commit/10e4763f Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-27 19:51:51 +02:00
ACPICA: actbl2.h: ERDT: Add typedef and other definitions ACPICA commit dddd9270531d74af523afa68515d8aae6a18bbe0 The ERDT table (and its many subtables) enumerate capabilities and methods for Intel Resource Director Technology to monitor and control L3 cache allocation and memory bandwidth by CPU cores and IO devices. Structure defined in the Intel Resource Director Technology (RDT) Architecture specification downloadable from www.intel.com/sdm Link: https://github.com/acpica/acpica/commit/dddd9270 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3296755.5fSG56mABF@rjwysocki.net
2025-04-25 21:27:24 +02:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Update for revision E.f ACPICA commit c4f5c083d24df9ddd71d5782c0988408cf0fc1ab The IORT spec, Issue E.f (April 2024), adds a new CANWBS bit to the Memory Access Flag field in the Memory Access Properties table, mainly for a PCI Root Complex. This CANWBS defines the coherency of memory accesses to be not marked IOWB cacheable/shareable. Its value further implies the coherency impact from a pair of mismatched memory attributes (e.g. in a nested translation case): 0x0: Use of mismatched memory attributes for accesses made by this device may lead to a loss of coherency. 0x1: Coherency of accesses made by this device to locations in Conventional memory are ensured as follows, even if the memory attributes for the accesses presented by the device or provided by the SMMU are different from Inner and Outer Write-back cacheable, Shareable. Link: https://github.com/acpica/acpica/commit/c4f5c083 Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com> Acked-by: Hanjun Guo <guohanjun@huawei.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Reviewed-by: Donald Dutile <ddutile@redhat.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/2-v4-9e99b76f3518+3a8-smmuv3_nesting_jgg@nvidia.com Signed-off-by: Will Deacon <will@kernel.org>
2024-10-30 21:20:46 -03:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Updates for revision E.b ACPICA commit 8710a708faed728ea2672b8da842b2e9af1cf5bd IORT revision E.b (ARM DEN 0049E.b) contains a few additions like, -Added an identifier field in the node descriptors to aid table cross-referencing. -Introduced the Reserved Memory Range(RMR) node. This is used to describe memory ranges that are used by endpoints and require a unity mapping in SMMU. -Introduced a flag in the RC node to express support for PRI. -Added a flag in the RC node to declare support for PASID forward information. Please note that IORT Rev E and E.a have known issues and are not supported. Link: https://github.com/acpica/acpica/commit/8710a708 Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:27 -07:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: actbl2: Replace 1-element arrays with flexible arrays ACPICA commit 44f1af0664599e87bebc3a1260692baa27b2f264 Similar to "Replace one-element array with flexible-array", replace the 1-element array with a proper flexible array member as defined by C99. This allows the code to operate without tripping compile-time and run- time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds, and/or -fstrict-flex-arrays=3). The sizeof() uses with struct acpi_nfit_flush_address and struct acpi_nfit_smbios have been adjusted to drop the open-coded subtraction of the trailing single element. The result is no binary differences in .text nor .data sections. Link: https://github.com/acpica/acpica/commit/44f1af06 Signed-off-by: Bob Moore <robert.moore@intel.com> Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:50:18 +02:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Add in support for the SMMUv3 subtable ACPICA commit 9f7c3e148f440049615e2791d73b292f65692d7e The most recent version of the IORT specification adds in a definition for a subtable to describe SMMUv3 devices; there is already a subtable for SMMUv1/v2 devices. Add in the definition of the subtable, add in the code to compile it, and add in a template for it. Link: https://github.com/acpica/acpica/commit/9f7c3e14 Signed-off-by: Al Stone <ahs3@redhat.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-24 09:39:07 +08:00
ACPICA: IORT: Add PMCG node supprt PMCG nodes were added by IORT revision C, with the unfortunate oversight that it only defined a single base address, and thus was incapable of properly describing PMCG implementations with PMCG_CFGR.RELOC_CTRS = 1, where the counters are in a separate page from the control registers. Revision D corrects this by clarifying the existing field as the page 0 base address and adding a second field to describe the page 1 address when implemented. With the spec now fit for purpose, let's support it. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-01 12:06:39 -07:00
ACPICA: IORT: Updates for revision E.b ACPICA commit 8710a708faed728ea2672b8da842b2e9af1cf5bd IORT revision E.b (ARM DEN 0049E.b) contains a few additions like, -Added an identifier field in the node descriptors to aid table cross-referencing. -Introduced the Reserved Memory Range(RMR) node. This is used to describe memory ranges that are used by endpoints and require a unity mapping in SMMU. -Introduced a flag in the RC node to express support for PRI. -Added a flag in the RC node to declare support for PASID forward information. Please note that IORT Rev E and E.a have known issues and are not supported. Link: https://github.com/acpica/acpica/commit/8710a708 Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:27 -07:00
ACPICA: Add Arm IORT IWB node definitions The IORT IUWB node is defined in IORT issue E.g See https://developer.arm.com/documentation/den0049/eg Link: https://github.com/acpica/acpica/commit/a90dc2f5380c Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2691130.Lt9SDvczpP@rafael.j.wysocki
2026-01-14 13:29:59 +01:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Update for revision E.f ACPICA commit c4f5c083d24df9ddd71d5782c0988408cf0fc1ab The IORT spec, Issue E.f (April 2024), adds a new CANWBS bit to the Memory Access Flag field in the Memory Access Properties table, mainly for a PCI Root Complex. This CANWBS defines the coherency of memory accesses to be not marked IOWB cacheable/shareable. Its value further implies the coherency impact from a pair of mismatched memory attributes (e.g. in a nested translation case): 0x0: Use of mismatched memory attributes for accesses made by this device may lead to a loss of coherency. 0x1: Coherency of accesses made by this device to locations in Conventional memory are ensured as follows, even if the memory attributes for the accesses presented by the device or provided by the SMMU are different from Inner and Outer Write-back cacheable, Shareable. Link: https://github.com/acpica/acpica/commit/c4f5c083 Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Nicolin Chen <nicolinc@nvidia.com> Acked-by: Hanjun Guo <guohanjun@huawei.com> Tested-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Jerry Snitselaar <jsnitsel@redhat.com> Reviewed-by: Donald Dutile <ddutile@redhat.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Link: https://lore.kernel.org/r/2-v4-9e99b76f3518+3a8-smmuv3_nesting_jgg@nvidia.com Signed-off-by: Will Deacon <will@kernel.org>
2024-10-30 21:20:46 -03:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: actbl2: Replace 1-element arrays with flexible arrays ACPICA commit 44f1af0664599e87bebc3a1260692baa27b2f264 Similar to "Replace one-element array with flexible-array", replace the 1-element array with a proper flexible array member as defined by C99. This allows the code to operate without tripping compile-time and run- time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds, and/or -fstrict-flex-arrays=3). The sizeof() uses with struct acpi_nfit_flush_address and struct acpi_nfit_smbios have been adjusted to drop the open-coded subtraction of the trailing single element. The result is no binary differences in .text nor .data sections. Link: https://github.com/acpica/acpica/commit/44f1af06 Signed-off-by: Bob Moore <robert.moore@intel.com> Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:50:18 +02:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: actbl2: Replace 1-element arrays with flexible arrays ACPICA commit 44f1af0664599e87bebc3a1260692baa27b2f264 Similar to "Replace one-element array with flexible-array", replace the 1-element array with a proper flexible array member as defined by C99. This allows the code to operate without tripping compile-time and run- time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds, and/or -fstrict-flex-arrays=3). The sizeof() uses with struct acpi_nfit_flush_address and struct acpi_nfit_smbios have been adjusted to drop the open-coded subtraction of the trailing single element. The result is no binary differences in .text nor .data sections. Link: https://github.com/acpica/acpica/commit/44f1af06 Signed-off-by: Bob Moore <robert.moore@intel.com> Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:50:18 +02:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Update for revision D IORT revision D contains a few additions and fixes to currently-supported tables: - SMMUv3 proximity domain field is enlarged to 4 bytes for consistency with SRAT - Root complex nodes gain an address size limit field equivalent to that of named components - Named component nodes gain a way to describe PASID (substream_ID) support, encoded in their flags Additionally, we fix a couple of outstanding points in passing: - Add the stall support flag for named components defined in revision C - Fix SMMUv3 HTTU override mask, which should always have been 2 bits Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-01 12:06:38 -07:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Update for revision D IORT revision D contains a few additions and fixes to currently-supported tables: - SMMUv3 proximity domain field is enlarged to 4 bytes for consistency with SRAT - Root complex nodes gain an address size limit field equivalent to that of named components - Named component nodes gain a way to describe PASID (substream_ID) support, encoded in their flags Additionally, we fix a couple of outstanding points in passing: - Add the stall support flag for named components defined in revision C - Fix SMMUv3 HTTU override mask, which should always have been 2 bits Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-01 12:06:38 -07:00
ACPICA: IORT: Updates for revision E.d ACPICA commit 87a2e39b8abdfedfb86b0a105708e37e895becd9 IORT revision is now updated to E.d (ARM DEN 0049E.d) and contains a few additions like, -Added descriptor in the root complex node for specifying PASID width supported by the root complex. -Updated RMR node Flags field. -Introduced memory access attributes in the RMR node. Please note that IORT Rev E.c is deprecated and not supported. Link: https://github.com/acpica/acpica/commit/87a2e39b Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 21:02:33 +02:00
ACPICA: actbl2: Replace 1-element arrays with flexible arrays ACPICA commit 44f1af0664599e87bebc3a1260692baa27b2f264 Similar to "Replace one-element array with flexible-array", replace the 1-element array with a proper flexible array member as defined by C99. This allows the code to operate without tripping compile-time and run- time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds, and/or -fstrict-flex-arrays=3). The sizeof() uses with struct acpi_nfit_flush_address and struct acpi_nfit_smbios have been adjusted to drop the open-coded subtraction of the trailing single element. The result is no binary differences in .text nor .data sections. Link: https://github.com/acpica/acpica/commit/44f1af06 Signed-off-by: Bob Moore <robert.moore@intel.com> Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:50:18 +02:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Updates for revision E.b ACPICA commit 8710a708faed728ea2672b8da842b2e9af1cf5bd IORT revision E.b (ARM DEN 0049E.b) contains a few additions like, -Added an identifier field in the node descriptors to aid table cross-referencing. -Introduced the Reserved Memory Range(RMR) node. This is used to describe memory ranges that are used by endpoints and require a unity mapping in SMMU. -Introduced a flag in the RC node to express support for PRI. -Added a flag in the RC node to declare support for PASID forward information. Please note that IORT Rev E and E.a have known issues and are not supported. Link: https://github.com/acpica/acpica/commit/8710a708 Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:27 -07:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Updates for revision E.b ACPICA commit 8710a708faed728ea2672b8da842b2e9af1cf5bd IORT revision E.b (ARM DEN 0049E.b) contains a few additions like, -Added an identifier field in the node descriptors to aid table cross-referencing. -Introduced the Reserved Memory Range(RMR) node. This is used to describe memory ranges that are used by endpoints and require a unity mapping in SMMU. -Introduced a flag in the RC node to express support for PRI. -Added a flag in the RC node to declare support for PASID forward information. Please note that IORT Rev E and E.a have known issues and are not supported. Link: https://github.com/acpica/acpica/commit/8710a708 Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:27 -07:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Updates for revision E.d ACPICA commit 87a2e39b8abdfedfb86b0a105708e37e895becd9 IORT revision is now updated to E.d (ARM DEN 0049E.d) and contains a few additions like, -Added descriptor in the root complex node for specifying PASID width supported by the root complex. -Updated RMR node Flags field. -Introduced memory access attributes in the RMR node. Please note that IORT Rev E.c is deprecated and not supported. Link: https://github.com/acpica/acpica/commit/87a2e39b Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 21:02:33 +02:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: actbl2: Replace 1-element arrays with flexible arrays ACPICA commit 44f1af0664599e87bebc3a1260692baa27b2f264 Similar to "Replace one-element array with flexible-array", replace the 1-element array with a proper flexible array member as defined by C99. This allows the code to operate without tripping compile-time and run- time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds, and/or -fstrict-flex-arrays=3). The sizeof() uses with struct acpi_nfit_flush_address and struct acpi_nfit_smbios have been adjusted to drop the open-coded subtraction of the trailing single element. The result is no binary differences in .text nor .data sections. Link: https://github.com/acpica/acpica/commit/44f1af06 Signed-off-by: Bob Moore <robert.moore@intel.com> Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:50:18 +02:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: IORT: Update SMMU models for revision C ACPICA commit d00a4eb86e64bb4fa70f57ab5e5ca0a4ca2ad8ef IORT revision C has been published with a number of new SMMU implementation identifiers; define them. Link: https://github.com/acpica/acpica/commit/d00a4eb8 Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-07-10 15:22:51 +08:00
ACPICA: ACPI 6.0: Add support for IORT table. ACPICA commit 5de82757aef5d6163e37064033aacbce193abbca This patch adds support for IORT (IO Remapping Table) in iasl. Note that some field names are modified to shrink their length or the decompiled IORT ASL will contain fields with ugly ":" alignment. The IORT contains field definitions around "Memory Access Properties". This patch also adds support to encode/decode it using inline table. This patch doesn't add inline table support for the SMMU interrupt fields due to a limitation in current ACPICA data table support. Lv Zheng. Link: https://github.com/acpica/acpica/commit/5de82757 Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:31:30 +08:00
ACPICA: iasl: Fix IORT SMMU GSI disassembling ACPICA commit 637b88de24a78c20478728d9d66632b06fcaa5bf If the IORT template is compiled and then iort.aml binary disassembled to iort.dsl, SMMUv1 node lists incorrect offset for SMMU_Nsg_cfg_irpt Interrupt: [0ECh 0236 8] SMMU_Nsg_irpt Interrupt : 0000000000000000 [0ECh 0236 8] SMMU_Nsg_cfg_irpt Interrupt : 0000000000000000 This is because iasl hasn't implemented SMMU GSI decoding yet. This patch fixes this issue by preparing structures for decoding IORT SMMU GSI. ACPICA BZ 1340, reported by Alexei Fedorov, fixed by Lv Zheng. Link: https://github.com/acpica/acpica/commit/637b88de Link: https://bugs.acpica.org/show_bug.cgi?id=1340 Reported-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-04-26 16:18:49 +08:00
ACPICA: IORT: Add in support for the SMMUv3 subtable ACPICA commit 9f7c3e148f440049615e2791d73b292f65692d7e The most recent version of the IORT specification adds in a definition for a subtable to describe SMMUv3 devices; there is already a subtable for SMMUv1/v2 devices. Add in the definition of the subtable, add in the code to compile it, and add in a template for it. Link: https://github.com/acpica/acpica/commit/9f7c3e14 Signed-off-by: Al Stone <ahs3@redhat.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-24 09:39:07 +08:00
ACPICA: IORT: Update SMMU models for revision C ACPICA commit d00a4eb86e64bb4fa70f57ab5e5ca0a4ca2ad8ef IORT revision C has been published with a number of new SMMU implementation identifiers; define them. Link: https://github.com/acpica/acpica/commit/d00a4eb8 Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-07-10 15:22:51 +08:00
ACPICA: IORT: Add in support for the SMMUv3 subtable ACPICA commit 9f7c3e148f440049615e2791d73b292f65692d7e The most recent version of the IORT specification adds in a definition for a subtable to describe SMMUv3 devices; there is already a subtable for SMMUv1/v2 devices. Add in the definition of the subtable, add in the code to compile it, and add in a template for it. Link: https://github.com/acpica/acpica/commit/9f7c3e14 Signed-off-by: Al Stone <ahs3@redhat.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-24 09:39:07 +08:00
ACPICA: IORT: Update for revision D IORT revision D contains a few additions and fixes to currently-supported tables: - SMMUv3 proximity domain field is enlarged to 4 bytes for consistency with SRAT - Root complex nodes gain an address size limit field equivalent to that of named components - Named component nodes gain a way to describe PASID (substream_ID) support, encoded in their flags Additionally, we fix a couple of outstanding points in passing: - Add the stall support flag for named components defined in revision C - Fix SMMUv3 HTTU override mask, which should always have been 2 bits Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-01 12:06:38 -07:00
ACPICA: iasl: Add SMMUv3 device ID mapping index support ACPICA commit 5c371879e035122c5807752f42247fd091d107d6 SMMUv3 device ID mapping index is used for SMMUv3 MSI which is introduced in IORT spec revision c, add its support for iasl. Tested with iasl -t IORT then get the right SMMUv3 node in iort.asl. Link: https://github.com/acpica/acpica/commit/5c371879 Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-11-17 15:42:19 -08:00
ACPICA: IORT: Add in support for the SMMUv3 subtable ACPICA commit 9f7c3e148f440049615e2791d73b292f65692d7e The most recent version of the IORT specification adds in a definition for a subtable to describe SMMUv3 devices; there is already a subtable for SMMUv1/v2 devices. Add in the definition of the subtable, add in the code to compile it, and add in a template for it. Link: https://github.com/acpica/acpica/commit/9f7c3e14 Signed-off-by: Al Stone <ahs3@redhat.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-24 09:39:07 +08:00
ACPICA: IORT: Update SMMU models for revision C ACPICA commit d00a4eb86e64bb4fa70f57ab5e5ca0a4ca2ad8ef IORT revision C has been published with a number of new SMMU implementation identifiers; define them. Link: https://github.com/acpica/acpica/commit/d00a4eb8 Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-07-10 15:22:51 +08:00
ACPICA: IORT: Add in support for the SMMUv3 subtable ACPICA commit 9f7c3e148f440049615e2791d73b292f65692d7e The most recent version of the IORT specification adds in a definition for a subtable to describe SMMUv3 devices; there is already a subtable for SMMUv1/v2 devices. Add in the definition of the subtable, add in the code to compile it, and add in a template for it. Link: https://github.com/acpica/acpica/commit/9f7c3e14 Signed-off-by: Al Stone <ahs3@redhat.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-24 09:39:07 +08:00
ACPICA: IORT: Update for revision D IORT revision D contains a few additions and fixes to currently-supported tables: - SMMUv3 proximity domain field is enlarged to 4 bytes for consistency with SRAT - Root complex nodes gain an address size limit field equivalent to that of named components - Named component nodes gain a way to describe PASID (substream_ID) support, encoded in their flags Additionally, we fix a couple of outstanding points in passing: - Add the stall support flag for named components defined in revision C - Fix SMMUv3 HTTU override mask, which should always have been 2 bits Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-01 12:06:38 -07:00
ACPICA: iasl: Update to IORT SMMUv3 disassembling ACPICA commit 8cadc4fb500e2aa52241e367c87a0f95d9760c58 ARM IORT specification has provision to define Proximity domain in SMMUv3 IORT table. Adding required changes to decode Proximity domain of SMMUv3 IORT table. Link: https://github.com/acpica/acpica/commit/8cadc4fb Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-07-10 15:24:15 +08:00
ACPICA: IORT: Update for revision E.e ACPICA commit 54b54732c5fc9e0384bcfd531f3c10d3a7b628b5 The latest IORT update makes one small addition to SMMUv3 nodes to describe MSI support independently of wired GSIV support. Link: https://github.com/acpica/acpica/commit/54b54732 Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-27 19:57:42 +02:00
ACPICA: IORT: Add in support for the SMMUv3 subtable ACPICA commit 9f7c3e148f440049615e2791d73b292f65692d7e The most recent version of the IORT specification adds in a definition for a subtable to describe SMMUv3 devices; there is already a subtable for SMMUv1/v2 devices. Add in the definition of the subtable, add in the code to compile it, and add in a template for it. Link: https://github.com/acpica/acpica/commit/9f7c3e14 Signed-off-by: Al Stone <ahs3@redhat.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-03-24 09:39:07 +08:00
ACPICA: IORT: Add PMCG node supprt PMCG nodes were added by IORT revision C, with the unfortunate oversight that it only defined a single base address, and thus was incapable of properly describing PMCG implementations with PMCG_CFGR.RELOC_CTRS = 1, where the counters are in a separate page from the control registers. Revision D corrects this by clarifying the existing field as the page 0 base address and adding a second field to describe the page 1 address when implemented. With the spec now fit for purpose, let's support it. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-06-01 12:06:39 -07:00
ACPICA: IORT: Updates for revision E.b ACPICA commit 8710a708faed728ea2672b8da842b2e9af1cf5bd IORT revision E.b (ARM DEN 0049E.b) contains a few additions like, -Added an identifier field in the node descriptors to aid table cross-referencing. -Introduced the Reserved Memory Range(RMR) node. This is used to describe memory ranges that are used by endpoints and require a unity mapping in SMMU. -Introduced a flag in the RC node to express support for PRI. -Added a flag in the RC node to declare support for PASID forward information. Please note that IORT Rev E and E.a have known issues and are not supported. Link: https://github.com/acpica/acpica/commit/8710a708 Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:27 -07:00
ACPICA: IORT: Updates for revision E.d ACPICA commit 87a2e39b8abdfedfb86b0a105708e37e895becd9 IORT revision is now updated to E.d (ARM DEN 0049E.d) and contains a few additions like, -Added descriptor in the root complex node for specifying PASID width supported by the root complex. -Updated RMR node Flags field. -Introduced memory access attributes in the RMR node. Please note that IORT Rev E.c is deprecated and not supported. Link: https://github.com/acpica/acpica/commit/87a2e39b Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 21:02:33 +02:00
ACPICA: IORT: Updates for revision E.b ACPICA commit 8710a708faed728ea2672b8da842b2e9af1cf5bd IORT revision E.b (ARM DEN 0049E.b) contains a few additions like, -Added an identifier field in the node descriptors to aid table cross-referencing. -Introduced the Reserved Memory Range(RMR) node. This is used to describe memory ranges that are used by endpoints and require a unity mapping in SMMU. -Introduced a flag in the RC node to express support for PRI. -Added a flag in the RC node to declare support for PASID forward information. Please note that IORT Rev E and E.a have known issues and are not supported. Link: https://github.com/acpica/acpica/commit/8710a708 Signed-off-by: Shameer Kolothum <shameerali.kolothum.thodi@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:27 -07:00
ACPICA: Add Arm IORT IWB node definitions The IORT IUWB node is defined in IORT issue E.g See https://developer.arm.com/documentation/den0049/eg Link: https://github.com/acpica/acpica/commit/a90dc2f5380c Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2691130.Lt9SDvczpP@rafael.j.wysocki
2026-01-14 13:29:59 +01:00
ACPICA: iASL: Add definitions for the IOVT table Add definitions for the IOVT table and its subtables. Link: https://github.com/acpica/acpica/commit/14c0def532ac Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2031013.PYKUYFuaPT@rafael.j.wysocki
2026-01-14 13:22:50 +01:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Implement IVRS IVHD type 11h parsing ACPICA commit 6ddc19419896e4149ced1b5f35f0dc12516c0399 The AMD IVRS table parsing supported only IVHD type 10h structures. Parsing an IVHD type 11h caused the iasl to report unknown subtable type. Add necessary structure definition for IVHD type 11h and apply correct parsing method based on subtable type. Link: https://github.com/acpica/acpica/commit/6ddc1941 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-03-27 15:21:02 -07:00
ACPICA: Add parsing for IVRS IVHD 40h and device entry F0h ACPICA commit eefb865355514048380d921de5efcf30027d6b02 IVHD type 40h uses the same field layout as type 11h, but adds support for a new device entry type F0h (ACPI HID device entry). The new device entry type has variable length: after fixed-length fields occupying 22 bytes, there's a field of length up to 255 (as given by the preceding field). Link: https://github.com/acpica/acpica/commit/eefb8653 Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:07 -07:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Implement IVRS IVHD type 11h parsing ACPICA commit 6ddc19419896e4149ced1b5f35f0dc12516c0399 The AMD IVRS table parsing supported only IVHD type 10h structures. Parsing an IVHD type 11h caused the iasl to report unknown subtable type. Add necessary structure definition for IVHD type 11h and apply correct parsing method based on subtable type. Link: https://github.com/acpica/acpica/commit/6ddc1941 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-03-27 15:21:02 -07:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Fix IVRS IVHD type 10h reserved field name ACPICA commit 87a1ab2b2a63e28776261c48bdbae345f790d05d According to AMD IOMMU Specification Revision 3.05 the reserved field should be IOMMU Feature Reporting. Change the name of the field to the correct one. Link: https://github.com/acpica/acpica/commit/87a1ab2b Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-03-27 15:21:03 -07:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Implement IVRS IVHD type 11h parsing ACPICA commit 6ddc19419896e4149ced1b5f35f0dc12516c0399 The AMD IVRS table parsing supported only IVHD type 10h structures. Parsing an IVHD type 11h caused the iasl to report unknown subtable type. Add necessary structure definition for IVHD type 11h and apply correct parsing method based on subtable type. Link: https://github.com/acpica/acpica/commit/6ddc1941 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2020-03-27 15:21:02 -07:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: AcpiSrc: Fix some translation issues for Linux conversion Fixes issues like this: i_aSL -> iASL 00-7_f -> 00-7F local_fADT -> local_FADT execute_oSI -> execute_OSI Also, in function headers, the parameters are now translated to lower case (with underscores if necessary.) Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2012-07-12 09:40:10 +08:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Add parsing for IVRS IVHD 40h and device entry F0h ACPICA commit eefb865355514048380d921de5efcf30027d6b02 IVHD type 40h uses the same field layout as type 11h, but adds support for a new device entry type F0h (ACPI HID device entry). The new device entry type has variable length: after fixed-length fields occupying 22 bytes, there's a field of length up to 255 (as given by the preceding field). Link: https://github.com/acpica/acpica/commit/eefb8653 Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:07 -07:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Add parsing for IVRS IVHD 40h and device entry F0h ACPICA commit eefb865355514048380d921de5efcf30027d6b02 IVHD type 40h uses the same field layout as type 11h, but adds support for a new device entry type F0h (ACPI HID device entry). The new device entry type has variable length: after fixed-length fields occupying 22 bytes, there's a field of length up to 255 (as given by the preceding field). Link: https://github.com/acpica/acpica/commit/eefb8653 Signed-off-by: Alexander Monakov <amonakov@ispras.ru> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:07 -07:00
ACPICA: iASL: Finish support for the IVRS ACPI table 1) Add compiler support for IVRS. 2) Update disassembler support for IVRS. 3) Add a new utility, ut_is_id_integer to determine if a HID/CID is an integer or a string. ACPICA commit 7eb0b770cb0efcf089cb217b5f8bafc0c6395a3d Link: https://github.com/acpica/acpica/commit/7eb0b770 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:25:58 -07:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Add KEYP table definition Software uses this table to discover the base address of the Key Configuration Unit (KCU) register block associated with each IDE capable host bridge. [1]: Root Complex IDE Key Configuration Unit Software Programming Guide https://cdrdv2.intel.com/v1/dl/getContent/732838 Link: https://github.com/acpica/acpica/commit/af970172e2dd Signed-off-by: Dave Jiang <dave.jiang@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3401908.44csPzL39Z@rafael.j.wysocki
2026-01-14 13:21:05 +01:00
ACPICA: Add support for LPIT table. Adds header, disassembler, table compiler, and template support for the Low Power Idle Table (LPIT). Note that the disassembler and table compiler are not shipped in the kernel. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-04-30 10:04:06 +08:00
ACPICA: ACPI 6.0: Add changes for LPIT table. ACPICA commit d527908bb33a3ed515cfb349cbec57121deafcc8 Second subtable type was removed from the July 2014 LPIT document. Link: https://github.com/acpica/acpica/commit/d527908b Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:30:59 +08:00
ACPICA: Add support for LPIT table. Adds header, disassembler, table compiler, and template support for the Low Power Idle Table (LPIT). Note that the disassembler and table compiler are not shipped in the kernel. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-04-30 10:04:06 +08:00
ACPICA: ACPI 6.0: Add changes for LPIT table. ACPICA commit d527908bb33a3ed515cfb349cbec57121deafcc8 Second subtable type was removed from the July 2014 LPIT document. Link: https://github.com/acpica/acpica/commit/d527908b Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-05-21 10:30:59 +08:00
ACPICA: Add support for LPIT table. Adds header, disassembler, table compiler, and template support for the Low Power Idle Table (LPIT). Note that the disassembler and table compiler are not shipped in the kernel. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-04-30 10:04:06 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: MADT: add Multiprocessor Wakeup Structure ACPICA commit b9eb6f3a19b816824d6f47a6bc86fd8ce690e04b Link: https://github.com/acpica/acpica/commit/b9eb6f3a Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:11 -07:00
ACPICA: MADT: Add loong_arch-specific APICs support ACPICA commit 1dc530059a3e6202e941e6a9478cf30f092bfb47 loong_arch-specific interrupt controllers (similar to APIC) are added in the next revision of ACPI Specification (current revision is 6.4), which including CORE_PIC (CPUINTC), LIO_PIC (LIOINTC), EIO_PIC (EIOINTC), HT_PIC (HTVECINTC), BIO_PIC (PCHINTC), LPC_PIC (PCHLPC) and MSI_PIC (PCHMSI). This patch add their definition. ACPI changes of loong_arch-specific interrupt controllers have already been approved in the ECRs, and will be public in the next revision of ACPI Specification. Link: https://github.com/acpica/acpica/commit/1dc53005 Link: https://mantis.uefi.org/mantis/view.php?id=2203 Link: https://mantis.uefi.org/mantis/view.php?id=2313 Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-27 19:47:30 +02:00
ACPICA: MADT: Add RISC-V INTC interrupt controller ACPICA commit bd6d1ae1e13abe78e149c8b61b4bc7bc7feab015 The ECR to add RISC-V INTC interrupt controller is approved by the UEFI forum and will be available in the next revision of the ACPI specification. Link: https://github.com/acpica/acpica/commit/bd6d1ae1 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:40:12 +02:00
ACPICA: MADT: Add RISC-V external interrupt controllers ACPICA commit 8c048cee4ea7b9ded8db3e1b3b9c14e21e084a2c This adds 3 different external interrupt controller definitions in MADT for RISC-V. 1) RISC-V PLIC is a platform interrupt controller for handling wired interrupt in a RISC-V systems. 2) RISC-V IMSIC is MSI interrupt controller to support MSI interrupts. 3) RISC-V APLIC has dual functionality. First it can act like PLIC and direct all wired interrupts to the CPU which doesn't have MSI controller. Second, when the CPU has MSI controller (IMSIC), it will act as a converter from wired interrupts to MSI. Update the existing RINTC structure also to support these external interrupt controllers. This codefirst ECR is approved by UEFI forum and will be part of next ACPI spec version. Link: https://github.com/acpica/acpica/commit/8c048cee Signed-off-by: Haibo, Xu <haibo1.xu@intel.com> Co-developed-by: Haibo, Xu <haibo1.xu@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-15 19:19:16 +05:30
ACPICA: Add GICv5 MADT structures The GICv5 adds the following MADT structures: - IRS - ITS Config Frame - ITS Translate Frame The ACPI spec ECR is at https://github.com/tianocore/edk2/issues/11148 Link: https://github.com/acpica/acpica/commit/69cca52ddf04 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1953107.CQOukoFCf9@rafael.j.wysocki
2026-01-14 13:29:05 +01:00
ACPICA: iASL/MADT: Add OEM-defined subtable ACPICA commit 4450b89b596a2b54b0cdfe2357b49a63445c2e03 Adds support for the "reserved for OEM use" subtable (types 0x80 to 0xFF). Link: https://github.com/acpica/acpica/commit/4450b89b Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 21:00:45 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: actbl2: Replace 1-element arrays with flexible arrays ACPICA commit 44f1af0664599e87bebc3a1260692baa27b2f264 Similar to "Replace one-element array with flexible-array", replace the 1-element array with a proper flexible array member as defined by C99. This allows the code to operate without tripping compile-time and run- time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds, and/or -fstrict-flex-arrays=3). The sizeof() uses with struct acpi_nfit_flush_address and struct acpi_nfit_smbios have been adjusted to drop the open-coded subtraction of the trailing single element. The result is no binary differences in .text nor .data sections. Link: https://github.com/acpica/acpica/commit/44f1af06 Signed-off-by: Bob Moore <robert.moore@intel.com> Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:50:18 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Add GICv5 MADT structures The GICv5 adds the following MADT structures: - IRS - ITS Config Frame - ITS Translate Frame The ACPI spec ECR is at https://github.com/tianocore/edk2/issues/11148 Link: https://github.com/acpica/acpica/commit/69cca52ddf04 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1953107.CQOukoFCf9@rafael.j.wysocki
2026-01-14 13:29:05 +01:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.3: MADT: add support for statistical profiling in GICC ACPICA commit 31b184052a986dc8d80c878edeca574d4ffa1cf5 Link: https://github.com/acpica/acpica/commit/31b18405 Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-02-15 13:36:14 -08:00
ACPICA: ACPI 6.5: MADT: add support for trace buffer extension in GICC ACPICA commit 1363e35dc6976143d118588b5124d72017365588 Link: https://github.com/acpica/acpica/commit/1363e35d Signed-off-by: Xiongfeng Wang <wangxiongfeng2@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:33:07 +02:00
ACPICA: Add GICv5 MADT structures The GICv5 adds the following MADT structures: - IRS - ITS Config Frame - ITS Translate Frame The ACPI spec ECR is at https://github.com/tianocore/edk2/issues/11148 Link: https://github.com/acpica/acpica/commit/69cca52ddf04 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1953107.CQOukoFCf9@rafael.j.wysocki
2026-01-14 13:29:05 +01:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: MADT: Add GICC online capable bit handling ACPICA commit 16f0befdeddf25756f317907798192bbaa417e5e Implement code to handle the GICC online capable bit management added into ACPI v6.5. Link: https://github.com/acpica/acpica/commit/16f0befd Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-12-27 12:00:36 +01:00
ACPICA: MADT: Add new MADT GICC/GICR/ITS non-coherent flags handling ACPICA commit c5d2010744b1bf7efba0bd04a8a9c200ef8fb610 Add new flags and related fields to the MADT GICC/GICR/ITS structures according to the code first ECR: https://bugzilla.tianocore.org/show_bug.cgi?id=4557 Update the MADT template to the latest MADT revision. Link: https://github.com/acpica/acpica/commit/c5d20107 Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-12-27 12:00:37 +01:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Add GICv5 MADT structures The GICv5 adds the following MADT structures: - IRS - ITS Config Frame - ITS Translate Frame The ACPI spec ECR is at https://github.com/tianocore/edk2/issues/11148 Link: https://github.com/acpica/acpica/commit/69cca52ddf04 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1953107.CQOukoFCf9@rafael.j.wysocki
2026-01-14 13:29:05 +01:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Add GICv5 MADT structures The GICv5 adds the following MADT structures: - IRS - ITS Config Frame - ITS Translate Frame The ACPI spec ECR is at https://github.com/tianocore/edk2/issues/11148 Link: https://github.com/acpica/acpica/commit/69cca52ddf04 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1953107.CQOukoFCf9@rafael.j.wysocki
2026-01-14 13:29:05 +01:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: MADT: Add new MADT GICC/GICR/ITS non-coherent flags handling ACPICA commit c5d2010744b1bf7efba0bd04a8a9c200ef8fb610 Add new flags and related fields to the MADT GICC/GICR/ITS structures according to the code first ECR: https://bugzilla.tianocore.org/show_bug.cgi?id=4557 Update the MADT template to the latest MADT revision. Link: https://github.com/acpica/acpica/commit/c5d20107 Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-12-27 12:00:37 +01:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: MADT: Add new MADT GICC/GICR/ITS non-coherent flags handling ACPICA commit c5d2010744b1bf7efba0bd04a8a9c200ef8fb610 Add new flags and related fields to the MADT GICC/GICR/ITS structures according to the code first ECR: https://bugzilla.tianocore.org/show_bug.cgi?id=4557 Update the MADT template to the latest MADT revision. Link: https://github.com/acpica/acpica/commit/c5d20107 Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-12-27 12:00:37 +01:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: MADT: Add new MADT GICC/GICR/ITS non-coherent flags handling ACPICA commit c5d2010744b1bf7efba0bd04a8a9c200ef8fb610 Add new flags and related fields to the MADT GICC/GICR/ITS structures according to the code first ECR: https://bugzilla.tianocore.org/show_bug.cgi?id=4557 Update the MADT template to the latest MADT revision. Link: https://github.com/acpica/acpica/commit/c5d20107 Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-12-27 12:00:37 +01:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: MADT: Add new MADT GICC/GICR/ITS non-coherent flags handling ACPICA commit c5d2010744b1bf7efba0bd04a8a9c200ef8fb610 Add new flags and related fields to the MADT GICC/GICR/ITS structures according to the code first ECR: https://bugzilla.tianocore.org/show_bug.cgi?id=4557 Update the MADT template to the latest MADT revision. Link: https://github.com/acpica/acpica/commit/c5d20107 Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-12-27 12:00:37 +01:00
ACPICA: actbl2.h: ACPI 6.6: Updates for MADT MPWakeup ACPI 6.6 introduces "Test" command for Multiprocessor Wakeup as well as resetting the Multiprocessor Wakeup Mailbox Link: https://github.com/acpica/acpica/commit/a4f629dc90fc Signed-off-by: Pawel Chmielewski <pawel.chmielewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2414431.ElGaqSPkdT@rafael.j.wysocki
2026-05-27 19:52:32 +02:00
ACPICA: ACPI 6.4: MADT: add Multiprocessor Wakeup Structure ACPICA commit b9eb6f3a19b816824d6f47a6bc86fd8ce690e04b Link: https://github.com/acpica/acpica/commit/b9eb6f3a Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:11 -07:00
x86/acpi: Rename fields in the acpi_madt_multiproc_wakeup structure In order to support MADT wakeup structure version 1, provide more appropriate names for the fields in the structure. Rename 'mailbox_version' to 'version'. This field signifies the version of the structure and the related protocols, rather than the version of the mailbox. This field has not been utilized in the code thus far. Rename 'base_address' to 'mailbox_address' to clarify the kind of address it represents. In version 1, the structure includes the reset vector address. Clear and distinct naming helps to prevent any confusion. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Kai Huang <kai.huang@intel.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Tested-by: Tao Liu <ltao@redhat.com> Link: https://lore.kernel.org/r/20240614095904.1345461-15-kirill.shutemov@linux.intel.com
2024-06-14 12:58:59 +03:00
ACPICA: ACPI 6.4: MADT: add Multiprocessor Wakeup Structure ACPICA commit b9eb6f3a19b816824d6f47a6bc86fd8ce690e04b Link: https://github.com/acpica/acpica/commit/b9eb6f3a Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:11 -07:00
x86/acpi: Rename fields in the acpi_madt_multiproc_wakeup structure In order to support MADT wakeup structure version 1, provide more appropriate names for the fields in the structure. Rename 'mailbox_version' to 'version'. This field signifies the version of the structure and the related protocols, rather than the version of the mailbox. This field has not been utilized in the code thus far. Rename 'base_address' to 'mailbox_address' to clarify the kind of address it represents. In version 1, the structure includes the reset vector address. Clear and distinct naming helps to prevent any confusion. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Kai Huang <kai.huang@intel.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Tested-by: Tao Liu <ltao@redhat.com> Link: https://lore.kernel.org/r/20240614095904.1345461-15-kirill.shutemov@linux.intel.com
2024-06-14 12:58:59 +03:00
x86/acpi: Add support for CPU offlining for ACPI MADT wakeup method MADT Multiprocessor Wakeup structure version 1 brings support for CPU offlining: BIOS provides a reset vector where the CPU has to jump to for offlining itself. The new TEST mailbox command can be used to test whether the CPU offlined itself which means the BIOS has control over the CPU and can online it again via the ACPI MADT wakeup method. Add CPU offlining support for the ACPI MADT wakeup method by implementing custom cpu_die(), play_dead() and stop_this_cpu() SMP operations. CPU offlining makes it possible to hand over secondary CPUs over kexec, not limiting the second kernel to a single CPU. The change conforms to the approved ACPI spec change proposal. See the Link. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Kai Huang <kai.huang@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Tested-by: Tao Liu <ltao@redhat.com> Link: https://lore.kernel.org/all/13356251.uLZWGnKmhe@kreacher Link: https://lore.kernel.org/r/20240614095904.1345461-19-kirill.shutemov@linux.intel.com
2024-06-14 12:59:03 +03:00
ACPICA: ACPI 6.4: MADT: add Multiprocessor Wakeup Structure ACPICA commit b9eb6f3a19b816824d6f47a6bc86fd8ce690e04b Link: https://github.com/acpica/acpica/commit/b9eb6f3a Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:11 -07:00
x86/acpi: Add support for CPU offlining for ACPI MADT wakeup method MADT Multiprocessor Wakeup structure version 1 brings support for CPU offlining: BIOS provides a reset vector where the CPU has to jump to for offlining itself. The new TEST mailbox command can be used to test whether the CPU offlined itself which means the BIOS has control over the CPU and can online it again via the ACPI MADT wakeup method. Add CPU offlining support for the ACPI MADT wakeup method by implementing custom cpu_die(), play_dead() and stop_this_cpu() SMP operations. CPU offlining makes it possible to hand over secondary CPUs over kexec, not limiting the second kernel to a single CPU. The change conforms to the approved ACPI spec change proposal. See the Link. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Kai Huang <kai.huang@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Tested-by: Tao Liu <ltao@redhat.com> Link: https://lore.kernel.org/all/13356251.uLZWGnKmhe@kreacher Link: https://lore.kernel.org/r/20240614095904.1345461-19-kirill.shutemov@linux.intel.com
2024-06-14 12:59:03 +03:00
ACPICA: Removed some tabs and // comments ACPICA commit 0914618b553d6f3366e568409cebf2656891ca69 Automated cleanup; No functional changes. Link: https://github.com/acpica/acpica/commit/0914618b Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 20:55:10 +02:00
ACPICA: ACPI 6.4: MADT: add Multiprocessor Wakeup Mailbox Structure ACPICA commit f1ee04207a212f6c519441e7e25397649ebc4cea Add Multiprocessor Wakeup Mailbox Structure definition. It is useful in parsing MADT Wake table. Link: https://github.com/acpica/acpica/commit/f1ee0420 Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:25:55 -07:00
x86/acpi: Add support for CPU offlining for ACPI MADT wakeup method MADT Multiprocessor Wakeup structure version 1 brings support for CPU offlining: BIOS provides a reset vector where the CPU has to jump to for offlining itself. The new TEST mailbox command can be used to test whether the CPU offlined itself which means the BIOS has control over the CPU and can online it again via the ACPI MADT wakeup method. Add CPU offlining support for the ACPI MADT wakeup method by implementing custom cpu_die(), play_dead() and stop_this_cpu() SMP operations. CPU offlining makes it possible to hand over secondary CPUs over kexec, not limiting the second kernel to a single CPU. The change conforms to the approved ACPI spec change proposal. See the Link. Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Kai Huang <kai.huang@intel.com> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Tested-by: Tao Liu <ltao@redhat.com> Link: https://lore.kernel.org/all/13356251.uLZWGnKmhe@kreacher Link: https://lore.kernel.org/r/20240614095904.1345461-19-kirill.shutemov@linux.intel.com
2024-06-14 12:59:03 +03:00
ACPICA: ACPI 6.4: MADT: add Multiprocessor Wakeup Mailbox Structure ACPICA commit f1ee04207a212f6c519441e7e25397649ebc4cea Add Multiprocessor Wakeup Mailbox Structure definition. It is useful in parsing MADT Wake table. Link: https://github.com/acpica/acpica/commit/f1ee0420 Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:25:55 -07:00
ACPICA: MADT: Add loong_arch-specific APICs support ACPICA commit 1dc530059a3e6202e941e6a9478cf30f092bfb47 loong_arch-specific interrupt controllers (similar to APIC) are added in the next revision of ACPI Specification (current revision is 6.4), which including CORE_PIC (CPUINTC), LIO_PIC (LIOINTC), EIO_PIC (EIOINTC), HT_PIC (HTVECINTC), BIO_PIC (PCHINTC), LPC_PIC (PCHLPC) and MSI_PIC (PCHMSI). This patch add their definition. ACPI changes of loong_arch-specific interrupt controllers have already been approved in the ECRs, and will be public in the next revision of ACPI Specification. Link: https://github.com/acpica/acpica/commit/1dc53005 Link: https://mantis.uefi.org/mantis/view.php?id=2203 Link: https://mantis.uefi.org/mantis/view.php?id=2313 Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-27 19:47:30 +02:00
ACPICA: MADT: Add RISC-V INTC interrupt controller ACPICA commit bd6d1ae1e13abe78e149c8b61b4bc7bc7feab015 The ECR to add RISC-V INTC interrupt controller is approved by the UEFI forum and will be available in the next revision of the ACPI specification. Link: https://github.com/acpica/acpica/commit/bd6d1ae1 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:40:12 +02:00
ACPICA: MADT: Add RISC-V external interrupt controllers ACPICA commit 8c048cee4ea7b9ded8db3e1b3b9c14e21e084a2c This adds 3 different external interrupt controller definitions in MADT for RISC-V. 1) RISC-V PLIC is a platform interrupt controller for handling wired interrupt in a RISC-V systems. 2) RISC-V IMSIC is MSI interrupt controller to support MSI interrupts. 3) RISC-V APLIC has dual functionality. First it can act like PLIC and direct all wired interrupts to the CPU which doesn't have MSI controller. Second, when the CPU has MSI controller (IMSIC), it will act as a converter from wired interrupts to MSI. Update the existing RINTC structure also to support these external interrupt controllers. This codefirst ECR is approved by UEFI forum and will be part of next ACPI spec version. Link: https://github.com/acpica/acpica/commit/8c048cee Signed-off-by: Haibo, Xu <haibo1.xu@intel.com> Co-developed-by: Haibo, Xu <haibo1.xu@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-15 19:19:16 +05:30
ACPICA: MADT: Add RISC-V INTC interrupt controller ACPICA commit bd6d1ae1e13abe78e149c8b61b4bc7bc7feab015 The ECR to add RISC-V INTC interrupt controller is approved by the UEFI forum and will be available in the next revision of the ACPI specification. Link: https://github.com/acpica/acpica/commit/bd6d1ae1 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:40:12 +02:00
ACPICA: MADT: Add RISC-V external interrupt controllers ACPICA commit 8c048cee4ea7b9ded8db3e1b3b9c14e21e084a2c This adds 3 different external interrupt controller definitions in MADT for RISC-V. 1) RISC-V PLIC is a platform interrupt controller for handling wired interrupt in a RISC-V systems. 2) RISC-V IMSIC is MSI interrupt controller to support MSI interrupts. 3) RISC-V APLIC has dual functionality. First it can act like PLIC and direct all wired interrupts to the CPU which doesn't have MSI controller. Second, when the CPU has MSI controller (IMSIC), it will act as a converter from wired interrupts to MSI. Update the existing RINTC structure also to support these external interrupt controllers. This codefirst ECR is approved by UEFI forum and will be part of next ACPI spec version. Link: https://github.com/acpica/acpica/commit/8c048cee Signed-off-by: Haibo, Xu <haibo1.xu@intel.com> Co-developed-by: Haibo, Xu <haibo1.xu@intel.com> Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-15 19:19:16 +05:30
ACPICA: Add GICv5 MADT structures The GICv5 adds the following MADT structures: - IRS - ITS Config Frame - ITS Translate Frame The ACPI spec ECR is at https://github.com/tianocore/edk2/issues/11148 Link: https://github.com/acpica/acpica/commit/69cca52ddf04 Signed-off-by: Jose Marinho <jose.marinho@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1953107.CQOukoFCf9@rafael.j.wysocki
2026-01-14 13:29:05 +01:00
ACPICA: MADT: Add loong_arch-specific APICs support ACPICA commit 1dc530059a3e6202e941e6a9478cf30f092bfb47 loong_arch-specific interrupt controllers (similar to APIC) are added in the next revision of ACPI Specification (current revision is 6.4), which including CORE_PIC (CPUINTC), LIO_PIC (LIOINTC), EIO_PIC (EIOINTC), HT_PIC (HTVECINTC), BIO_PIC (PCHINTC), LPC_PIC (PCHLPC) and MSI_PIC (PCHMSI). This patch add their definition. ACPI changes of loong_arch-specific interrupt controllers have already been approved in the ECRs, and will be public in the next revision of ACPI Specification. Link: https://github.com/acpica/acpica/commit/1dc53005 Link: https://mantis.uefi.org/mantis/view.php?id=2203 Link: https://mantis.uefi.org/mantis/view.php?id=2313 Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-10-27 19:47:30 +02:00
ACPICA: iASL/MADT: Add OEM-defined subtable ACPICA commit 4450b89b596a2b54b0cdfe2357b49a63445c2e03 Adds support for the "reserved for OEM use" subtable (types 0x80 to 0xFF). Link: https://github.com/acpica/acpica/commit/4450b89b Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 21:00:45 +02:00
ACPICA: acpi_madt_oem_data: Fix flexible array member definition ACPICA commit e7f6d8c1b7f79eb4b9b07f1bc09c549a2acbd6e8 Use ACPI_FLEX_ARRAY() helper to define flexible array member alone in a struct. Fixes issue #812. No binary changes appear in the .text nor .data sections. Link: https://github.com/acpica/acpica/commit/e7f6d8c1 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:56:06 +02:00
ACPICA: iASL/MADT: Add OEM-defined subtable ACPICA commit 4450b89b596a2b54b0cdfe2357b49a63445c2e03 Adds support for the "reserved for OEM use" subtable (types 0x80 to 0xFF). Link: https://github.com/acpica/acpica/commit/4450b89b Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 21:00:45 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Add support for MADT online enabled bit The online enabled bit on newer ACPI implmentations will indicate whether the CPU is hotpluggable. Link: http://github.com/acpica/acpica/pull/708/ Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-09-08 16:41:45 -05:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00
ACPICA: Comment updates - no functional change. Change all instances of "sub-table" to "subtable" for consistency. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-04-30 10:04:28 +08:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00
ACPICA: Add support for MCHI table Disassembler and header file support for MCHI - Managment Controller Host Interface table. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2010-03-03 16:30:35 +08:00
ACPICA: Add support for Arm's MPAM ACPI table version 2 ACPICA commit 005e24bcaa6e4c7db327b4f81fb63b2715aac7e6 Complies with ACPI for Memory System Resource Partitioning and Monitoring 2.0 [1]. Document number: DEN0065, as of December 2022. Support for all types of MPAM resources. No support yet for: 1) MPAM PCC Interface Type 2) The optional Resource-specific data per MSC node, introduced in v2 of the MPAM ACPI spec. [1] https://developer.arm.com/documentation/den0065/latest Link: https://github.com/acpica/acpica/commit/005e24bc Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:37:35 +02:00
ACPICA: MPAM: Correct the typo in struct acpi_mpam_msc_node member ACPICA commit 3da3f7d776d17e9bfbb15de88317de8d7397ce38 A member of the struct acpi_mpam_msc_node that represents a Memory System Controller node structure - num_resource_nodes has a typo. Fix the typo No functional change. Link: https://github.com/acpica/acpica/commit/3da3f7d7 Signed-off-by: Punit Agrawal <punit.agrawal@bytedance.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-02-07 19:54:20 +00:00
ACPICA: Add support for Arm's MPAM ACPI table version 2 ACPICA commit 005e24bcaa6e4c7db327b4f81fb63b2715aac7e6 Complies with ACPI for Memory System Resource Partitioning and Monitoring 2.0 [1]. Document number: DEN0065, as of December 2022. Support for all types of MPAM resources. No support yet for: 1) MPAM PCC Interface Type 2) The optional Resource-specific data per MSC node, introduced in v2 of the MPAM ACPI spec. [1] https://developer.arm.com/documentation/den0065/latest Link: https://github.com/acpica/acpica/commit/005e24bc Signed-off-by: Hesham Almatary <hesham.almatary@huawei.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:37:35 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: actbl2.h: MRRM: Add typedef and other definitions ACPICA commit 04fd53b2647b9f6f98cfca551383689cb3b59362 The MRRM table describes association between physical address ranges and "region numbers". Structure defined in the Intel Resource Director Technology (RDT) Architecture specification downloadable from www.intel.com/sdm Link: https://github.com/acpica/acpica/commit/04fd53b2 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3372188.44csPzL39Z@rjwysocki.net
2025-04-25 21:24:02 +02:00
ACPICA: MRRM: Some cleanups ACPICA commit 022e2e4169841f429dbda677a4780830bf4c2177 1) Added source specification to MRRM table comment in actbl2.h 2) Shorten typedef from ACPI_TABLE_MRRM_MEM_RANGE_ENTRY to struct acpi_mrrm_mem_range_entry 3) Add new typedefs to source/tools/acpisrc/astable.c 4) Fix cut and paste errors in acpi_dm_table_info_mrrm0[] definition 5) Fix indent and source code style errors in actbl2.h 6) The base/length fields in the memory range structure are system memory addresses, not "MMIO". Update the acpi_dm_table_info_mrrm0[] strings. 7) Add main/sub table comments to acpi_dm_dump_mrrm() and dt_compile_mrrm() Link: https://github.com/acpica/acpica/commit/022e2e41 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2018955.PYKUYFuaPT@rjwysocki.net
2025-04-25 21:25:23 +02:00
ACPICA: actbl2.h: MRRM: Add typedef and other definitions ACPICA commit 04fd53b2647b9f6f98cfca551383689cb3b59362 The MRRM table describes association between physical address ranges and "region numbers". Structure defined in the Intel Resource Director Technology (RDT) Architecture specification downloadable from www.intel.com/sdm Link: https://github.com/acpica/acpica/commit/04fd53b2 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3372188.44csPzL39Z@rjwysocki.net
2025-04-25 21:24:02 +02:00
ACPICA: MRRM: Some cleanups ACPICA commit 022e2e4169841f429dbda677a4780830bf4c2177 1) Added source specification to MRRM table comment in actbl2.h 2) Shorten typedef from ACPI_TABLE_MRRM_MEM_RANGE_ENTRY to struct acpi_mrrm_mem_range_entry 3) Add new typedefs to source/tools/acpisrc/astable.c 4) Fix cut and paste errors in acpi_dm_table_info_mrrm0[] definition 5) Fix indent and source code style errors in actbl2.h 6) The base/length fields in the memory range structure are system memory addresses, not "MMIO". Update the acpi_dm_table_info_mrrm0[] strings. 7) Add main/sub table comments to acpi_dm_dump_mrrm() and dt_compile_mrrm() Link: https://github.com/acpica/acpica/commit/022e2e41 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2018955.PYKUYFuaPT@rjwysocki.net
2025-04-25 21:25:23 +02:00
ACPICA: actbl2.h: MRRM: Add typedef and other definitions ACPICA commit 04fd53b2647b9f6f98cfca551383689cb3b59362 The MRRM table describes association between physical address ranges and "region numbers". Structure defined in the Intel Resource Director Technology (RDT) Architecture specification downloadable from www.intel.com/sdm Link: https://github.com/acpica/acpica/commit/04fd53b2 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3372188.44csPzL39Z@rjwysocki.net
2025-04-25 21:24:02 +02:00
ACPICA: MRRM: Some cleanups ACPICA commit 022e2e4169841f429dbda677a4780830bf4c2177 1) Added source specification to MRRM table comment in actbl2.h 2) Shorten typedef from ACPI_TABLE_MRRM_MEM_RANGE_ENTRY to struct acpi_mrrm_mem_range_entry 3) Add new typedefs to source/tools/acpisrc/astable.c 4) Fix cut and paste errors in acpi_dm_table_info_mrrm0[] definition 5) Fix indent and source code style errors in actbl2.h 6) The base/length fields in the memory range structure are system memory addresses, not "MMIO". Update the acpi_dm_table_info_mrrm0[] strings. 7) Add main/sub table comments to acpi_dm_dump_mrrm() and dt_compile_mrrm() Link: https://github.com/acpica/acpica/commit/022e2e41 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2018955.PYKUYFuaPT@rjwysocki.net
2025-04-25 21:25:23 +02:00
ACPICA: infrastructure: Add new DMT_BUF types and shorten a long name ACPICA commit b8713f71b4023a0396fe61503bbbf5226e5eed1b Some ERDT subtables have 11 and 24 byte reserved fields. Add the ACPI_DMT_BUF11 and ACPI_DMT_BUF24 types to describe these reserved fields in struct acpi_dmtable_info structures. Shorten the ACPI_SUBTABLE_HEADER_16 name to ACPI_SUBTBL_HDR Link: https://github.com/acpica/acpica/commit/b8713f71 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3643286.iIbC2pHGDl@rjwysocki.net
2025-04-25 21:26:44 +02:00
ACPICA: actbl2.h: MRRM: Add typedef and other definitions ACPICA commit 04fd53b2647b9f6f98cfca551383689cb3b59362 The MRRM table describes association between physical address ranges and "region numbers". Structure defined in the Intel Resource Director Technology (RDT) Architecture specification downloadable from www.intel.com/sdm Link: https://github.com/acpica/acpica/commit/04fd53b2 Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/3372188.44csPzL39Z@rjwysocki.net
2025-04-25 21:24:02 +02:00
ACPICA: iASL: Add support for MSDM ACPI table. ACPICA commit a2c590ce9bff850e3abf4fd430cede860a3cb1fa This is the Microsoft Data Management table. MSDM table is not used in the Linux kernel. Link: https://github.com/acpica/acpica/commit/a2c590ce Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-04-13 11:51:08 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: NFIT: add Location Cookie field Also, update struct size to reflect these changes in nfit core driver. ACPICA commit af60199a9a1de9e6844929fd4cc22334522ed195 Link: https://github.com/acpica/acpica/commit/af60199a Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:15 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: NFIT: add Location Cookie field Also, update struct size to reflect these changes in nfit core driver. ACPICA commit af60199a9a1de9e6844929fd4cc22334522ed195 Link: https://github.com/acpica/acpica/commit/af60199a Cc: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:15 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: struct acpi_nfit_interleave: Replace 1-element array with flexible array ACPICA commit e66decc6fca36b59194b0947d87d6a9bec078bc3 Similar to "Replace one-element array with flexible-array", replace the 1-element array with a proper flexible array member as defined by C99. This allows the code to operate without tripping compile-time and run- time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds, and/or -fstrict-flex-arrays=3). Unlike struct acpi_nfit_flush_address and struct acpi_nfit_smbios, which had their sizeof() uses adjusted in code, struct acpi_nfit_interleave did not. This appears to have been a bug. After this change, there is a binary difference in acpi_dm_dump_nfit() since the size of the structure now has the correct size, as the prior result was including the trailing U32: - mov $0x14,%ebp + mov $0x10,%ebp Link: https://github.com/acpica/acpica/commit/e66decc6 Signed-off-by: Bob Moore <robert.moore@intel.com> Reviewed-by: Dan Williams <dan.j.williams@intel.com> Tested-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:51:25 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: actbl2: Replace 1-element arrays with flexible arrays ACPICA commit 44f1af0664599e87bebc3a1260692baa27b2f264 Similar to "Replace one-element array with flexible-array", replace the 1-element array with a proper flexible array member as defined by C99. This allows the code to operate without tripping compile-time and run- time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds, and/or -fstrict-flex-arrays=3). The sizeof() uses with struct acpi_nfit_flush_address and struct acpi_nfit_smbios have been adjusted to drop the open-coded subtraction of the trailing single element. The result is no binary differences in .text nor .data sections. Link: https://github.com/acpica/acpica/commit/44f1af06 Signed-off-by: Bob Moore <robert.moore@intel.com> Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:50:18 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: actbl2: Replace 1-element arrays with flexible arrays ACPICA commit 44f1af0664599e87bebc3a1260692baa27b2f264 Similar to "Replace one-element array with flexible-array", replace the 1-element array with a proper flexible array member as defined by C99. This allows the code to operate without tripping compile-time and run- time bounds checkers (e.g. via __builtin_object_size(), -fsanitize=bounds, and/or -fstrict-flex-arrays=3). The sizeof() uses with struct acpi_nfit_flush_address and struct acpi_nfit_smbios have been adjusted to drop the open-coded subtraction of the trailing single element. The result is no binary differences in .text nor .data sections. Link: https://github.com/acpica/acpica/commit/44f1af06 Signed-off-by: Bob Moore <robert.moore@intel.com> Co-developed-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:50:18 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Streamline struct naming Few recently introduced structs are named 'nhlt2' instead of 'nhlt' to avoid naming conflicts. With duplicate types gone, the conflicts are no more. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:18 +01:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPI: NHLT: Streamline struct naming Few recently introduced structs are named 'nhlt2' instead of 'nhlt' to avoid naming conflicts. With duplicate types gone, the conflicts are no more. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:18 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL/Disassembler: Additional support for NHLT table ACPICA commit 0420852ffc520b81960e877852703b739c16025c Added support for Vendor-defined microphone arrays and SNR (signal-to-noise) extension. Link: https://github.com/acpica/acpica/commit/0420852f Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-22 17:25:40 +01:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL/Disassembler: Additional support for NHLT table ACPICA commit 0420852ffc520b81960e877852703b739c16025c Added support for Vendor-defined microphone arrays and SNR (signal-to-noise) extension. Link: https://github.com/acpica/acpica/commit/0420852f Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-22 17:25:40 +01:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPI: NHLT: Streamline struct naming Few recently introduced structs are named 'nhlt2' instead of 'nhlt' to avoid naming conflicts. With duplicate types gone, the conflicts are no more. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:18 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Streamline struct naming Few recently introduced structs are named 'nhlt2' instead of 'nhlt' to avoid naming conflicts. With duplicate types gone, the conflicts are no more. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:18 +01:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPI: NHLT: Streamline struct naming Few recently introduced structs are named 'nhlt2' instead of 'nhlt' to avoid naming conflicts. With duplicate types gone, the conflicts are no more. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:18 +01:00
ACPICA: iASL table disassembler: Added disassembly support for the NHLT ACPI table ACPICA commit 94abe858583de24a425b37cb8e62d56c65c4f3cf Note: support for Vendor-defined microphone arrays and SNR extensions are not supported at this time -- mostly due to a lack of example tables. Actual compiler support for NHLT is forthcoming. Link: https://github.com/acpica/acpica/commit/94abe858 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-10-01 20:16:25 +02:00
ACPICA: iASL: NHLT: Rename linux specific strucures to device_info ACPICA commit 68c7e542075319d57129467872fcbe98906f2b2c Those structures aren't used by Linux drivers, and in other NHLT related tools they are called device_info. Link: https://github.com/acpica/acpica/commit/68c7e542 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 20:50:25 +02:00
ACPI: NHLT: Reintroduce types the table consists of ACPICA commit 32260f5ce519e854546ce907fc0cc449e1fe51fe Non HDAudio Link Table (NHLT) is designed to separate hardware-related description (registers) from AudioDSP firmware-related one i.e.: pipelines and modules that together make up the audio stream on Intel DSPs. This task is important as same set of hardware registers can be used with different topologies and vice versa, same topology could be utilized with different set of hardware. As the hardware registers description is directly tied to specific platform, intention is to have such description part of low-level firmware e.g.: BIOS. The initial design has been provided in early Sky Lake (SKL) days. The audio architecture goes by the name cAVS. SKL is a representative of cAVS 1.5. The table helps describe endpoint capabilities ever since. While Raptor Lake (RPL) is the last of cAVS architecture - cAVS 2.5 to be precise - its successor, the ACE architecture which begun with Meteor Lake (MTL) inherited the design for all I2S and PDM configurations. These two configurations are the primary targets for NHLT table. Due to naming conflicts with existing code, several structs are named 'nhlt2' rather than 'nhlt'. Follow up changes clean this up once existing code has no users and is removed. Link: https://github.com/acpica/acpica/pull/912 Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:15 +01:00
ACPI: NHLT: Streamline struct naming Few recently introduced structs are named 'nhlt2' instead of 'nhlt' to avoid naming conflicts. With duplicate types gone, the conflicts are no more. Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2024-03-19 09:30:18 +01:00
ACPICA: iASL/NHLT table: "Specific Data" field support ACPICA commit 26f8c721fb01e4a26eec8c85dffcbe950d5e61a9 Add support for optional "Specific Data" field for the optional Linux-specific structure that appears at the end of an Endpoint Descriptor. Link: https://github.com/acpica/acpica/commit/26f8c721 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-22 17:37:56 +01:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PCCT: add support for subtable type 5 ACPICA commit 208d7e27ebc473feb4182cc8e58f3789c4efaca6 Link: https://github.com/acpica/acpica/commit/208d7e27 Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:12 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PCCT: add support for subtable type 5 ACPICA commit 208d7e27ebc473feb4182cc8e58f3789c4efaca6 Link: https://github.com/acpica/acpica/commit/208d7e27 Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:12 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.3: Add Trigger order to PCC Identifier structure in PDTT ACPICA commit b11446d8b47805c2637a2286aca34b717ec6b5be Link: https://github.com/acpica/acpica/commit/b11446d8 Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-02-15 13:36:11 -08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: add support for PHAT table ACPICA commit de805b6a355c01f3aff4044a4ba60e9845b7668c This table displays health information about the platform firmware. For full definition, see the ACPI specification. Link: https://github.com/acpica/acpica/commit/de805b6a Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:23 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PMTT: add new fields/structures ACPICA commit 036290735ad8020f762c4d94bcbc0e84b2e307b6 Link: https://github.com/acpica/acpica/commit/03629073 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:21 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PMTT: add new fields/structures ACPICA commit 036290735ad8020f762c4d94bcbc0e84b2e307b6 Link: https://github.com/acpica/acpica/commit/03629073 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:21 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PMTT: add new fields/structures ACPICA commit 036290735ad8020f762c4d94bcbc0e84b2e307b6 Link: https://github.com/acpica/acpica/commit/03629073 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:21 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PMTT: add new fields/structures ACPICA commit 036290735ad8020f762c4d94bcbc0e84b2e307b6 Link: https://github.com/acpica/acpica/commit/03629073 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:21 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PMTT: add new fields/structures ACPICA commit 036290735ad8020f762c4d94bcbc0e84b2e307b6 Link: https://github.com/acpica/acpica/commit/03629073 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:21 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PMTT: add new fields/structures ACPICA commit 036290735ad8020f762c4d94bcbc0e84b2e307b6 Link: https://github.com/acpica/acpica/commit/03629073 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:21 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PMTT: add new fields/structures ACPICA commit 036290735ad8020f762c4d94bcbc0e84b2e307b6 Link: https://github.com/acpica/acpica/commit/03629073 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:21 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.3: PPTT add additional fields in Processor Structure Flags ACPICA commit c736ea34add19a3a07e0e398711847cd6b95affd Link: https://github.com/acpica/acpica/commit/c736ea34 Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2019-02-15 13:36:16 -08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PPTT: add new version of subtable type 1 This commit squashes the following: ACPICA commit 475c5e89f8f701ccdfee6ca567e33c854ecd6c9e ACPICA commit 82cf78ac175a4b7d8842c5b786be24031c817cfd This new subtable is only valid for PPTT version 3. Elyes fixed a misspelled identifier in this commit. Link: https://github.com/acpica/acpica/commit/475c5e89 Link: https://github.com/acpica/acpica/commit/82cf78ac Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:13 -07:00
ACPICA: ACPI 6.4: PPTT: include all fields in subtable type1 In PPTT version 3 an extra field, Cache ID, was added to the Cache Type Structure. The struct, struct acpi_pptt_cache_v1, contains only this field. This differs from the treatment of other versioned structures and is unexpected for linux which reuses the actbl2.h header file. Include all the fields of the new Cache Type Structure in struct acpi_pptt_cache_v1 and fix up all uses. Link: https://github.com/acpica/acpica/commit/a9ec9105f552 Signed-off-by: Ben Horgan <ben.horgan@arm.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1851677.VLH7GnMWUR@rafael.j.wysocki
2026-01-14 13:26:26 +01:00
ACPICA: ACPI 6.4: PPTT: add new version of subtable type 1 This commit squashes the following: ACPICA commit 475c5e89f8f701ccdfee6ca567e33c854ecd6c9e ACPICA commit 82cf78ac175a4b7d8842c5b786be24031c817cfd This new subtable is only valid for PPTT version 3. Elyes fixed a misspelled identifier in this commit. Link: https://github.com/acpica/acpica/commit/475c5e89 Link: https://github.com/acpica/acpica/commit/82cf78ac Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:13 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: PPTT: add new version of subtable type 1 This commit squashes the following: ACPICA commit 475c5e89f8f701ccdfee6ca567e33c854ecd6c9e ACPICA commit 82cf78ac175a4b7d8842c5b786be24031c817cfd This new subtable is only valid for PPTT version 3. Elyes fixed a misspelled identifier in this commit. Link: https://github.com/acpica/acpica/commit/475c5e89 Link: https://github.com/acpica/acpica/commit/82cf78ac Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:13 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: iASL: add disassembler support for PRMT ACPICA commit f70e7593e37c9e29f19be8ad3ef93f3f34799368 Link: https://github.com/acpica/acpica/commit/f70e7593 Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:26:06 -07:00
ACPICA: Add PRMT module header to facilitate parsing ACPICA commit bd46cb07e614fd85ea69e54c1f6f0ae0a5fb20ab This structure is used in to parse PRMT in other Operating Systems that relies on using subtable headers in order to parse ACPI tables. Although the PRMT doesn't have "subtables" it has a list of module information structures that act as subtables. Link: https://github.com/acpica/acpica/commit/bd46cb07 Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-09 20:41:51 -07:00
ACPICA: iASL: add disassembler support for PRMT ACPICA commit f70e7593e37c9e29f19be8ad3ef93f3f34799368 Link: https://github.com/acpica/acpica/commit/f70e7593 Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:26:06 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.5: RAS2: Add support for RAS2 table ACPICA commit c581606cf49b7574d29c02b1a3bc144650375e32 Add support for ACPI RAS2 feature table(RAS2) defined in the ACPI 6.5 Specification & upwards revision, section 5.2.21. The RAS2 table provides interfaces for platform RAS features. RAS2 offers the same services as RASF, but is more scalable than the latter. RAS2 supports independent RAS controls and capabilities for a given RAS feature for multiple instances of the same component in a given system. The platform can support either RAS2 or RASF but not both. Link: https://github.com/acpica/acpica/commit/c581606c Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-09-27 17:41:52 +01:00
ACPICA: actbl2.h: ACPI 6.5: RAS2: Rename structure and field names of the RAS2 table ACPICA commit 2c8a38f747de9d977491a494faf0dfaf799b777b Rename the structure and field names of the RAS2 table to shorten them and avoid long lines in the ACPI RAS2 drivers. 1. struct acpi_ras2_shared_memory to struct acpi_ras2_shmem 2. In struct acpi_ras2_shared_memory: fields, - set_capabilities[16] to set_caps[16] - num_parameter_blocks to num_param_blks - set_capabilities_status to set_caps_status 3. struct acpi_ras2_patrol_scrub_parameter to struct acpi_ras2_patrol_scrub_param 4. In struct acpi_ras2_patrol_scrub_parameter: fields, - patrol_scrub_command to command - requested_address_range to req_addr_range - actual_address_range to actl_addr_range Link: https://github.com/acpica/acpica/commit/2c8a38f7 Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1942053.CQOukoFCf9@rjwysocki.net
2025-04-25 21:29:12 +02:00
ACPICA: ACPI 6.5: RAS2: Add support for RAS2 table ACPICA commit c581606cf49b7574d29c02b1a3bc144650375e32 Add support for ACPI RAS2 feature table(RAS2) defined in the ACPI 6.5 Specification & upwards revision, section 5.2.21. The RAS2 table provides interfaces for platform RAS features. RAS2 offers the same services as RASF, but is more scalable than the latter. RAS2 supports independent RAS controls and capabilities for a given RAS feature for multiple instances of the same component in a given system. The platform can support either RAS2 or RASF but not both. Link: https://github.com/acpica/acpica/commit/c581606c Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-09-27 17:41:52 +01:00
ACPICA: actbl2.h: ACPI 6.5: RAS2: Rename structure and field names of the RAS2 table ACPICA commit 2c8a38f747de9d977491a494faf0dfaf799b777b Rename the structure and field names of the RAS2 table to shorten them and avoid long lines in the ACPI RAS2 drivers. 1. struct acpi_ras2_shared_memory to struct acpi_ras2_shmem 2. In struct acpi_ras2_shared_memory: fields, - set_capabilities[16] to set_caps[16] - num_parameter_blocks to num_param_blks - set_capabilities_status to set_caps_status 3. struct acpi_ras2_patrol_scrub_parameter to struct acpi_ras2_patrol_scrub_param 4. In struct acpi_ras2_patrol_scrub_parameter: fields, - patrol_scrub_command to command - requested_address_range to req_addr_range - actual_address_range to actl_addr_range Link: https://github.com/acpica/acpica/commit/2c8a38f7 Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1942053.CQOukoFCf9@rjwysocki.net
2025-04-25 21:29:12 +02:00
ACPICA: ACPI 6.5: RAS2: Add support for RAS2 table ACPICA commit c581606cf49b7574d29c02b1a3bc144650375e32 Add support for ACPI RAS2 feature table(RAS2) defined in the ACPI 6.5 Specification & upwards revision, section 5.2.21. The RAS2 table provides interfaces for platform RAS features. RAS2 offers the same services as RASF, but is more scalable than the latter. RAS2 supports independent RAS controls and capabilities for a given RAS feature for multiple instances of the same component in a given system. The platform can support either RAS2 or RASF but not both. Link: https://github.com/acpica/acpica/commit/c581606c Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-09-27 17:41:52 +01:00
ACPICA: actbl2.h: ACPI 6.5: RAS2: Rename structure and field names of the RAS2 table ACPICA commit 2c8a38f747de9d977491a494faf0dfaf799b777b Rename the structure and field names of the RAS2 table to shorten them and avoid long lines in the ACPI RAS2 drivers. 1. struct acpi_ras2_shared_memory to struct acpi_ras2_shmem 2. In struct acpi_ras2_shared_memory: fields, - set_capabilities[16] to set_caps[16] - num_parameter_blocks to num_param_blks - set_capabilities_status to set_caps_status 3. struct acpi_ras2_patrol_scrub_parameter to struct acpi_ras2_patrol_scrub_param 4. In struct acpi_ras2_patrol_scrub_parameter: fields, - patrol_scrub_command to command - requested_address_range to req_addr_range - actual_address_range to actl_addr_range Link: https://github.com/acpica/acpica/commit/2c8a38f7 Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1942053.CQOukoFCf9@rjwysocki.net
2025-04-25 21:29:12 +02:00
ACPICA: ACPI 6.5: RAS2: Add support for RAS2 table ACPICA commit c581606cf49b7574d29c02b1a3bc144650375e32 Add support for ACPI RAS2 feature table(RAS2) defined in the ACPI 6.5 Specification & upwards revision, section 5.2.21. The RAS2 table provides interfaces for platform RAS features. RAS2 offers the same services as RASF, but is more scalable than the latter. RAS2 supports independent RAS controls and capabilities for a given RAS feature for multiple instances of the same component in a given system. The platform can support either RAS2 or RASF but not both. Link: https://github.com/acpica/acpica/commit/c581606c Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-09-27 17:41:52 +01:00
ACPICA: actbl2.h: ACPI 6.5: RAS2: Rename structure and field names of the RAS2 table ACPICA commit 2c8a38f747de9d977491a494faf0dfaf799b777b Rename the structure and field names of the RAS2 table to shorten them and avoid long lines in the ACPI RAS2 drivers. 1. struct acpi_ras2_shared_memory to struct acpi_ras2_shmem 2. In struct acpi_ras2_shared_memory: fields, - set_capabilities[16] to set_caps[16] - num_parameter_blocks to num_param_blks - set_capabilities_status to set_caps_status 3. struct acpi_ras2_patrol_scrub_parameter to struct acpi_ras2_patrol_scrub_param 4. In struct acpi_ras2_patrol_scrub_parameter: fields, - patrol_scrub_command to command - requested_address_range to req_addr_range - actual_address_range to actl_addr_range Link: https://github.com/acpica/acpica/commit/2c8a38f7 Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/1942053.CQOukoFCf9@rjwysocki.net
2025-04-25 21:29:12 +02:00
ACPICA: ACPI 6.5: RAS2: Add support for RAS2 table ACPICA commit c581606cf49b7574d29c02b1a3bc144650375e32 Add support for ACPI RAS2 feature table(RAS2) defined in the ACPI 6.5 Specification & upwards revision, section 5.2.21. The RAS2 table provides interfaces for platform RAS features. RAS2 offers the same services as RASF, but is more scalable than the latter. RAS2 supports independent RAS controls and capabilities for a given RAS feature for multiple instances of the same component in a given system. The platform can support either RAS2 or RASF but not both. Link: https://github.com/acpica/acpica/commit/c581606c Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-09-27 17:41:52 +01:00
ACPICA: actbl2.h: ACPI 6.6: RAS2: Update Parameter Block structure ACPI 6.6 introduces RAS2 enhancements for patrol scrub functionality, adding new fields to the Parameter Block structure. These fields are applicable only in the response to the GET_PATROL_PARAMETERS command. Link: https://github.com/acpica/acpica/commit/062842024000 Signed-off-by: Pawel Chmielewski <pawel.chmielewski@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/2263284.Mh6RI2rZIc@rafael.j.wysocki
2026-01-14 13:31:06 +01:00
ACPICA: ACPI 6.5: RAS2: Add support for RAS2 table ACPICA commit c581606cf49b7574d29c02b1a3bc144650375e32 Add support for ACPI RAS2 feature table(RAS2) defined in the ACPI 6.5 Specification & upwards revision, section 5.2.21. The RAS2 table provides interfaces for platform RAS features. RAS2 offers the same services as RASF, but is more scalable than the latter. RAS2 supports independent RAS controls and capabilities for a given RAS feature for multiple instances of the same component in a given system. The platform can support either RAS2 or RASF but not both. Link: https://github.com/acpica/acpica/commit/c581606c Signed-off-by: Shiju Jose <shiju.jose@huawei.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-09-27 17:41:52 +01:00
ACPICA: iASL Table Compiler: Add full support for RGRT ACPI table ACPICA commit 6949e1dd2d92788a994ce657857fe8809159e71e Includes compiler, disassembler, and template generator. Link: https://github.com/acpica/acpica/commit/6949e1dd Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:26:00 -07:00
ACPICA: Headers: Replace zero-length array with flexible-array member ACPICA commit 98835f452c698b015d4da999944405ecb90da670 There is a regular need in the kernel to provide a way to declare having a dynamically sized set of trailing elements in a structure. Kernel code should always use “flexible array members”[1] for these cases. The older style of one-element or zero-length arrays should no longer be used[2]. [1] https://en.wikipedia.org/wiki/Flexible_array_member [2] https://www.kernel.org/doc/html/v5.16/process/deprecated.html#zero-length-and-one-element-arrays Link: https://github.com/acpica/acpica/commit/98835f45 Link: https://github.com/KSPP/linux/issues/78 Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Kees Cook <keescook@chromium.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2022-04-11 20:56:15 +02:00
ACPICA: iASL Table Compiler: Add full support for RGRT ACPI table ACPICA commit 6949e1dd2d92788a994ce657857fe8809159e71e Includes compiler, disassembler, and template generator. Link: https://github.com/acpica/acpica/commit/6949e1dd Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:26:00 -07:00
ACPICA: Add structure definitions for RISC-V RHCT ACPICA commit 82afd0434e79f74b96a6be88115ddc8343a1ba40 RISC-V Hart Capabilities Table (RHCT) is a new static table. The ECR to add RHCT is approved by the UEFI forum and will be available in the next version of the ACPI spec. Link: https://github.com/acpica/acpica/commit/82afd043 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:40:57 +02:00
ACPICA: RHCT: Add flags, CMO and MMU nodes ACPICA commit 2eded5a6a13d892b7dc3be6096e7b1e8d4407600 Update RHCT table with below details. 1) Add additional structure to describe the Cache Management Operation (CMO) related information. 2) Add structure to describe MMU type. 3) Convert the current reserved field to flags and define a flag to indicate timer capability. This codefirst ECR is approved by UEFI forum and will be part of next ACPI spec version. Link: https://github.com/acpica/acpica/commit/2eded5a6 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-15 20:17:54 +05:30
ACPICA: Add structure definitions for RISC-V RHCT ACPICA commit 82afd0434e79f74b96a6be88115ddc8343a1ba40 RISC-V Hart Capabilities Table (RHCT) is a new static table. The ECR to add RHCT is approved by the UEFI forum and will be available in the next version of the ACPI spec. Link: https://github.com/acpica/acpica/commit/82afd043 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:40:57 +02:00
ACPICA: RHCT: Add flags, CMO and MMU nodes ACPICA commit 2eded5a6a13d892b7dc3be6096e7b1e8d4407600 Update RHCT table with below details. 1) Add additional structure to describe the Cache Management Operation (CMO) related information. 2) Add structure to describe MMU type. 3) Convert the current reserved field to flags and define a flag to indicate timer capability. This codefirst ECR is approved by UEFI forum and will be part of next ACPI spec version. Link: https://github.com/acpica/acpica/commit/2eded5a6 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-15 20:17:54 +05:30
ACPICA: Add structure definitions for RISC-V RHCT ACPICA commit 82afd0434e79f74b96a6be88115ddc8343a1ba40 RISC-V Hart Capabilities Table (RHCT) is a new static table. The ECR to add RHCT is approved by the UEFI forum and will be available in the next version of the ACPI spec. Link: https://github.com/acpica/acpica/commit/82afd043 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:40:57 +02:00
ACPICA: RHCT: Add flags, CMO and MMU nodes ACPICA commit 2eded5a6a13d892b7dc3be6096e7b1e8d4407600 Update RHCT table with below details. 1) Add additional structure to describe the Cache Management Operation (CMO) related information. 2) Add structure to describe MMU type. 3) Convert the current reserved field to flags and define a flag to indicate timer capability. This codefirst ECR is approved by UEFI forum and will be part of next ACPI spec version. Link: https://github.com/acpica/acpica/commit/2eded5a6 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-15 20:17:54 +05:30
ACPICA: Add structure definitions for RISC-V RHCT ACPICA commit 82afd0434e79f74b96a6be88115ddc8343a1ba40 RISC-V Hart Capabilities Table (RHCT) is a new static table. The ECR to add RHCT is approved by the UEFI forum and will be available in the next version of the ACPI spec. Link: https://github.com/acpica/acpica/commit/82afd043 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:40:57 +02:00
ACPICA: RHCT: Add flags, CMO and MMU nodes ACPICA commit 2eded5a6a13d892b7dc3be6096e7b1e8d4407600 Update RHCT table with below details. 1) Add additional structure to describe the Cache Management Operation (CMO) related information. 2) Add structure to describe MMU type. 3) Convert the current reserved field to flags and define a flag to indicate timer capability. This codefirst ECR is approved by UEFI forum and will be part of next ACPI spec version. Link: https://github.com/acpica/acpica/commit/2eded5a6 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-15 20:17:54 +05:30
ACPICA: Add structure definitions for RISC-V RHCT ACPICA commit 82afd0434e79f74b96a6be88115ddc8343a1ba40 RISC-V Hart Capabilities Table (RHCT) is a new static table. The ECR to add RHCT is approved by the UEFI forum and will be available in the next version of the ACPI spec. Link: https://github.com/acpica/acpica/commit/82afd043 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-04-05 15:40:57 +02:00
ACPICA: actbl2: Add definitions for RIMT ACPICA commit 73c32bc89cad64ab19c1231a202361e917e6823c RISC-V IO Mapping Table (RIMT) is a new static table defined for RISC-V to communicate IOMMU information to the OS. The specification for RIMT is available at [1]. Add structure definitions for RIMT. Link: https://github.com/riscv-non-isa/riscv-acpi-rimt [1] Link: https://github.com/acpica/acpica/commit/73c32bc8 Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Link: https://patch.msgid.link/10665648.nUPlyArG6x@rjwysocki.net
2025-04-25 21:24:41 +02:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: iASL: Add support for the SDEI table ACPICA commit 5ad4f0b7bf9e7ba175bd320cf7950f3b38799ff3 ACPI 6.2 adds support for the Software Delegated Exception Interface, which is described by "Software Delegated Exception Interface (SDEI)" ARM DEN0054A. Add the necessary types in the ACPICA header files and support for compiling/decompiling the table. Link: https://github.com/acpica/acpica/commit/5ad4f0b7 Signed-off-by: James Morse <james.morse@arm.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-08-03 14:26:25 +08:00
ACPICA: Header support for SLIC table We finally have the definition for this table. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-03-18 09:49:41 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Header support for SLIC table We finally have the definition for this table. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-03-18 09:49:41 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Header support for SLIC table We finally have the definition for this table. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2011-03-18 09:49:41 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 4: Update headers for new and changed ACPI tables. Add IVRS,MSCT,UEFI,WAET,WDAT. Updated several existing tables for ACPI 4.0-related changes. Added document references for all tables not defined in ACPI spec. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-27 10:53:00 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: ACPI 6.4: add SDEV secure access components ACPICA commit 44ca5f4f9be24bf64524cdb1de46322509319056 This entails adding an optional subtable indicating secure access components as well as two different types of secure access components (ID-based or Memory). For definitons and uses, consult the ACPI specification. Link: https://github.com/acpica/acpica/commit/44ca5f4f Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:18 -07:00
ACPICA: iASL: Add support for TCPA Server Table ACPICA commit 55fa9555c71eaa99daebed4cd82cfde3875e8c45 In addition to the existing support for the client table. Link: https://github.com/acpica/acpica/commit/55fa9555 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-07-23 12:54:04 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: iASL: Add support for TCPA Server Table ACPICA commit 55fa9555c71eaa99daebed4cd82cfde3875e8c45 In addition to the existing support for the client table. Link: https://github.com/acpica/acpica/commit/55fa9555 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-07-23 12:54:04 +08:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00
ACPICA: ACPI 6.4: add SDEV secure access components ACPICA commit 44ca5f4f9be24bf64524cdb1de46322509319056 This entails adding an optional subtable indicating secure access components as well as two different types of secure access components (ID-based or Memory). For definitons and uses, consult the ACPI specification. Link: https://github.com/acpica/acpica/commit/44ca5f4f Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-04-06 14:30:18 -07:00
ACPICA: Restructure ACPI table files ACPICA commit a025731aec31745b775f7bdcd850c57d0a08298d Split/restructure: Table headers (actbl1*.h) disassembler table info files (dmtbinfo*.c) disassembler table dump files (dmtbdump*.c) Adds 6 new files. Link: https://github.com/acpica/acpica/commit/a025731a Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Schmauss <erik.schmauss@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2018-02-15 13:09:26 -08:00
ACPICA: Update definitions for the TCPA and TPM2 ACPI tables ACPICA commit 33140b4498666337dd33a00cf3c4797a53981a7b Changes for a new version of the 3rd party spec for these tables, the "TCG ACPI Specification", December 14, 2014. Also, moved the definition of TPM2 to actbl2.h, next to TCPA, since both should be together. Update the table compiler/disassembler code for the tables. However, the "Server" TCPA table is not supported at this time. Link: https://github.com/acpica/acpica/commit/33140b44 Reported-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-07-01 14:45:25 +08:00
ACPICA: Add SVKL table headers ACPICA commit b5e6bcf69dbb9877481992d5ce86008cfb94f5b8 SVKL (Storage Volume Key Location Table) is used by BIOS/Firmware to share storage volume encryption key's with OS. It will be used by userspace to decrypt and mount encrypted drives. So add SVKL table signature and add it to known signatures array support SVKL. You can find details about the SVKL table in TDX specfication titled "Guest-Host-Communication Interface (GHCI) for Intel Trust Domain Extensions (Intel® TDX)", sec 4.4 and in ACPI specification r6.4, sec 5.2.6. Link: https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-guest-hypervisor-communication-interface.pdf Link: https://github.com/acpica/acpica/commit/b5e6bcf6 Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:25:56 -07:00
ACPICA: iASL: Add support for the SVKL table Includes the table compiler, the disassembler and the template generator. ACPICA commit 27a434379e3ecafea5340c0c384789ea2062c4fb Link: https://github.com/acpica/acpica/commit/27a43437 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:25:59 -07:00
ACPICA: Add SVKL table headers ACPICA commit b5e6bcf69dbb9877481992d5ce86008cfb94f5b8 SVKL (Storage Volume Key Location Table) is used by BIOS/Firmware to share storage volume encryption key's with OS. It will be used by userspace to decrypt and mount encrypted drives. So add SVKL table signature and add it to known signatures array support SVKL. You can find details about the SVKL table in TDX specfication titled "Guest-Host-Communication Interface (GHCI) for Intel Trust Domain Extensions (Intel® TDX)", sec 4.4 and in ACPI specification r6.4, sec 5.2.6. Link: https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-guest-hypervisor-communication-interface.pdf Link: https://github.com/acpica/acpica/commit/b5e6bcf6 Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:25:56 -07:00
ACPICA: iASL: Add support for the SVKL table Includes the table compiler, the disassembler and the template generator. ACPICA commit 27a434379e3ecafea5340c0c384789ea2062c4fb Link: https://github.com/acpica/acpica/commit/27a43437 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:25:59 -07:00
ACPICA: Add SVKL table headers ACPICA commit b5e6bcf69dbb9877481992d5ce86008cfb94f5b8 SVKL (Storage Volume Key Location Table) is used by BIOS/Firmware to share storage volume encryption key's with OS. It will be used by userspace to decrypt and mount encrypted drives. So add SVKL table signature and add it to known signatures array support SVKL. You can find details about the SVKL table in TDX specfication titled "Guest-Host-Communication Interface (GHCI) for Intel Trust Domain Extensions (Intel® TDX)", sec 4.4 and in ACPI specification r6.4, sec 5.2.6. Link: https://software.intel.com/content/dam/develop/external/us/en/documents/intel-tdx-guest-hypervisor-communication-interface.pdf Link: https://github.com/acpica/acpica/commit/b5e6bcf6 Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Erik Kaneda <erik.kaneda@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-06-04 14:25:56 -07:00
ACPICA: Add SoundWire File Table (SWFT) signature The File Download (FDL) process of SoundWire Class Audio (SDCA) driver, which provides code/data which may be required by an SDCA device, utilizes SWFT to obtain that code/data. There is a single SWFT for the system, and SWFT can contain multiple files (information about the file as well as its binary contents). The SWFT has a standard ACPI Descriptor Table Header, followed by SoundWire File definitions as described in Discovery and Configuration (DisCo) Specification for SoundWire® Link: https://github.com/acpica/acpica/commit/18c96022 Signed-off-by: Maciej Strozek <mstrozek@opensource.cirrus.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://patch.msgid.link/20250811134505.1162661-1-mstrozek@opensource.cirrus.com Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-08-11 14:45:05 +01:00
ACPICA: iASL: Add TDEL table to both compiler/disassembler ACPICA commit 403f9965aba7ff9d2ed5b41bbffdd2a1ed0f596f Added struct acpi_pcc_info to acpi_src. Link: https://github.com/acpica/acpica/commit/403f9965 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-12-22 17:36:30 +01:00
ACPICA: Revert "Headers: Deploy #pragma pack (push) and (pop)." This reverts commit aae576e5faefa8ba70647efa320d4747b6375f1e. Push and Pop are not portable "enough", and caused problems for some ACPICA customers. Signed-off-by: Robert Moore <Robert.Moore@intel.com> Signed-off-by: Lv Zheng <lv.zheng@intel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-03-05 14:12:01 +08:00
ACPICA: Split large ACPI table header Split out the non-acpi-defined ACPI tables into the existing (but empty) actbl2.h file. Preparation for new ACPI 4.0 tables. Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
2009-07-24 13:30:17 +08:00