RISC-V Devicetrees for v6.16

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Starfive:
 All Starfive this time (again), enabling the usb3 port on the framework
 laptop mainboard, and a few cleanup patches that are syncing things with
 the dts used by U-Boot.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Merge tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt

RISC-V Devicetrees for v6.16

Starfive:
All Starfive this time (again), enabling the usb3 port on the framework
laptop mainboard, and a few cleanup patches that are syncing things with
the dts used by U-Boot.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader
  riscv: dts: starfive: jh7110-common: add eeprom node to i2c5
  riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz
  riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg
  riscv: dts: starfive: jh7110-common: use macros for MMC0 pins
  riscv: dts: starfive: fml13v01: enable USB 3.0 port

Link: https://lore.kernel.org/r/20250516-gap-exploring-f8f516ab4e1c@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

...

This commit is contained in:

Arnd Bergmann 2025-05-21 23:57:48 +02:00

parent ced334a21c d50108706a

commit 00000994fe

2 changed files with 57 additions and 14 deletions

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52

arch/riscv/boot/dts/starfive/jh7110-common.dtsi

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19

arch/riscv/boot/dts/starfive/jh7110-deepcomputing-fml13v01.dts

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