drm/radeon: enable gfx cgcg on CIK APUs

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Enable coarse grained clockgating.  This works properly now
that smc is initialized earlier than the rlc and cp.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Alex Deucher 2013-12-19 09:15:24 -05:00

parent 92598db0b4

commit 0042fca504

1 changed files with 2 additions and 2 deletions

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drivers/gpu/drm/radeon/radeon_asic.c

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