drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update

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This is a clean-up and a preparation for adding own SFF and CFF registers
for LunarLake onwards.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Animesh Manna <animesh.manna@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250213064804.2077127-4-jouni.hogander@intel.com

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Jouni Högander 2025-02-13 08:47:54 +02:00

parent 8e8cadfd88

commit 005010f1f7

1 changed files with 31 additions and 57 deletions

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drivers/gpu/drm/i915/display/intel_psr.c

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