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spi/pxa2xx: enable multiblock DMA transfers for LPSS devices
Intel LPSS SPI controllers need to have bit 0 (disable_ssp_dma_finish) set in SSP_REG in order to properly perform DMA transfers spanning over multiple blocks. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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