spi/pxa2xx: enable multiblock DMA transfers for LPSS devices

Intel LPSS SPI controllers need to have bit 0 (disable_ssp_dma_finish) set
in SSP_REG in order to properly perform DMA transfers spanning over
multiple blocks.

Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Mika Westerberg 2013-03-05 12:05:17 +02:00 • committed by Mark Brown
commit 0054e28dc9