drm/i915/bxt, glk: Avoid long atomic poll during CDCLK change

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There is no requirement for doing the PCODE request polling atomically,
so do that only for a short time switching to sleeping poll afterwards.
The specification requires a 150usec timeout for the change notification,
so let's use that for the atomic poll. Do the extra 2ms poll - needed as
a workaround on BXT/GLK - in sleeping mode.

v2:
- rebase on v2 of patchset dropping the sandybridge_pcode_read/write
  refactoring (Chris)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20180130142939.17983-2-imre.deak@intel.com

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This commit is contained in:

Imre Deak 2018-01-30 16:29:39 +02:00

parent e76019a819

commit 006bb4ccac

3 changed files with 9 additions and 6 deletions

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5

drivers/gpu/drm/i915/i915_drv.h

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4

drivers/gpu/drm/i915/intel_cdclk.c

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6

drivers/gpu/drm/i915/intel_pm.c

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