clk: meson: mpll: add rw operation

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This patch adds new callbacks to the meson-mpll driver to control
and set the pll rate. For this, we also need to add the enable bit and
sdm enable bit. The corresponding parameters are added to mpll data
structure.

Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Link: lkml.kernel.org/r/20170309104154.28295-6-jbrunet@baylibre.com

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Jerome Brunet 2017-03-09 11:41:50 +01:00 • committed by Michael Turquette

parent b92332eea8

commit 007e6e5c5f

3 changed files with 180 additions and 6 deletions

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152

drivers/clk/meson/clk-mpll.c

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4

drivers/clk/meson/clkc.h

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30

drivers/clk/meson/gxbb.c

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