clk: mvebu: ap806: add AP-DCLK (hclk) to system controller driver

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Add dynamic AP-DCLK clock (hclk) to system controller driver. AP-DCLK
is half the rate of DDR clock, so its derrived from Sample At Reset
configuration. The clock frequency is required for AP806 AXI monitor
profiling feature.

Signed-off-by: Omri Itach <omrii@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lkml.kernel.org/r/20190805100310.29048-7-miquel.raynal@bootlin.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Omri Itach 2019-08-05 12:03:08 +02:00 • committed by Stephen Boyd

parent cd016cb018

commit 0099dc446b

1 changed files with 46 additions and 2 deletions

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drivers/clk/mvebu/ap806-system-controller.c

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