drm/amd/ras: limit eeprom ras table validation to init and post-write

Browse source

The eeprom ras table can be quite large, and each read requires multiple
smu i2c transactions (max 24 bytes per transfer). Limit the validation
to avoid excessive i2c traffic and CPU busy-wait overhead.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

YiPeng Chai 2026-06-30 11:03:28 +08:00 • committed by Alex Deucher

parent 7e44e70fa7

commit 00a5a6e534

2 changed files with 29 additions and 4 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

31

drivers/gpu/drm/amd/ras/core/eeprom.c

View file

2

drivers/gpu/drm/amd/ras/core/eeprom.h

View file