drm/amd/display: Add missing HBM support and raise Vega20's uclk.

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[Why]
When more than 2 displays are connected to the graphics card,
only the minimum memory clock is needed. However, when more
displays are connected, the minimum memory clock is not
sufficient enough to support the overwhelming bandwidth.
System will hang under this circumstance.

Also, the old code didn't address HBM cards, which has 2
pseudo channels. We need to add the HBM part here.

[How]
When graphics card connects to 2 or more displays,
switch to high memory clock. Also, choose memory
multiplier based on whether its regular DRAM or HBM.

Signed-off-by: Zhan Liu <zhan.liu@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Zhan Liu 2019-08-22 14:54:18 -04:00 • committed by Alex Deucher

parent 79816043f0

commit 00d22e9e04

1 changed files with 16 additions and 2 deletions

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drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/dce110_clk_mgr.c

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