irqchip/mchp-eic: Add support for the Microchip EIC

Browse source

Add support for Microchip External Interrupt Controller. The controller
supports 2 external interrupt lines. For every external input there is
a connection to GIC. The interrupt controllers contains only 4
registers:
- EIC_GFCS (read only): which indicates that glitch filter configuration
  is ready (not addressed in this implementation)
- EIC_SCFG0R, EIC_SCFG1R (read, write): allows per interrupt specific
  settings: enable, polarity/edge settings, glitch filter settings
- EIC_WPMR, EIC_WPSR: enables write protection mode specific settings
  (which are architecture specific) for the controller and are not
  addressed in this implementation

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20210927063657.2157676-3-claudiu.beznea@microchip.com

...

This commit is contained in:

Claudiu Beznea 2021-09-27 09:36:57 +03:00 • committed by Marc Zyngier

parent 36179af21c

commit 00fa3461c8

4 changed files with 295 additions and 0 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

6

MAINTAINERS

View file

8

drivers/irqchip/Kconfig

View file

1

drivers/irqchip/Makefile

View file

280

drivers/irqchip/irq-mchp-eic.c

View file