arm64: cpufeature: Spell out register fields for ID_ISAR4 and ID_PFR1

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In preparation for runtime updates to the strictness of some AArch32
features, spell out the register fields for ID_ISAR4 and ID_PFR1 to make
things clearer to read. Note that this isn't functionally necessary, as
the feature arrays themselves are not modified dynamically and remain
'const'.

Tested-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20200421142922.18950-3-will@kernel.org
Signed-off-by: Will Deacon <will@kernel.org>

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This commit is contained in:

Will Deacon 2020-04-21 15:29:16 +01:00

parent 9d3f888135

commit 0113340e6e

2 changed files with 43 additions and 2 deletions

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17

arch/arm64/include/asm/sysreg.h

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28

arch/arm64/kernel/cpufeature.c

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