clk: renesas: r8a779a0: Add FCPVD clock support

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Add clocks for the FCP for VSP-D module.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20201216151931.851547-2-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Kieran Bingham 2020-12-16 15:19:29 +00:00 • committed by Geert Uytterhoeven

parent fa7f47972b

commit 0177b5090e

1 changed files with 2 additions and 0 deletions

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drivers/clk/renesas/r8a779a0-cpg-mssr.c

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