clk: renesas: rzg2l: Add support for RZ/G3S PLL

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Add support for reading the frequency of PLL1/4/6 as available on
RZ/G3S.  The computation formula for the PLL frequency is as follows:

    Fout = (nir + nfr / 4096) * Fin / (mr * pr)

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-8-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Claudiu Beznea 2023-09-29 08:38:54 +03:00 • committed by Geert Uytterhoeven

parent 5f710e3bc5

commit 01eabef547

2 changed files with 48 additions and 4 deletions

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49

drivers/clk/renesas/rzg2l-cpg.c

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3

drivers/clk/renesas/rzg2l-cpg.h

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