drm/amd/display: Defer LUT memory powerdown until LUT bypass latches

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[WHY]
Blnd, 3dlut, and shaper LUT select registers are double buffered, however
their accompanying LUT memory shutdown registers are not. As a result,
shutting down LUT memory immediately after setting a block to bypass causes
corruption as bypass only happens at next Vupdate.

[HOW]
Re-enable mem low power for CM block
Force optimization on next flip and disable LUT memory during optimization
sequence if LUT select field is then set to bypass

v2: squash in CONFIG_DRM_AMD_DC_DCN fix (Alex)

Reviewed-by: Eric Yang <Eric.Yang2@amd.com>
Acked-by: Anson Jacob <Anson.Jacob@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

...

This commit is contained in:

Michael Strauss 2021-09-09 16:33:52 -04:00 • committed by Alex Deucher

parent 87e9585b36

commit 028a998c62

4 changed files with 87 additions and 7 deletions

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21

drivers/gpu/drm/amd/display/dc/core/dc.c

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59

drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c

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2

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c

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12

drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h

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