pmdomain: mediatek: Add support for Direct CTL simple power sequence

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Some new SoCs like MT8196, MT6991, and others, have got one
additional power controller (usually in the HFRP Multimedia
block) which needs a simplified power on/off sequence while
using Direct Control strategy.

Domains using the "simple power sequence" are not backed by
the RTFF hardware, have no Bus Protection mechanism, lacks
the ISO, PWR_ON, PWR_ON_2ND bits, and therefore get enabled
automatically after getting out of reset.

This simple power sequence is then a subset of the full one
as only needs the enablement of the specific power domain's
clock input and reset (where, again, after getting out of
reset, the ISO and PWR_ON bits are automatically internally
getting flipped) to enable or disable (power on or off).

Moreover, the simple power sequence power domains guarantee
that they always get enabled/disabled after executing the
relevant power sequence (on/off) so, differently from the
others, there is also no need to poll for a PWR_ACK.

Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Ulf Hansson <ulfh@kernel.org>

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This commit is contained in:

AngeloGioacchino Del Regno 2026-07-09 10:46:34 +02:00 • committed by Ulf Hansson

parent 1f1bbce068

commit 02a2a92c12

2 changed files with 82 additions and 16 deletions

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97

drivers/pmdomain/mediatek/mtk-pm-domains.c

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1

drivers/pmdomain/mediatek/mtk-pm-domains.h

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