sh: intc - shared IPR and INTC2 controller

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This is the second version of the shared interrupt controller patch
for the sh architecture, fixing up handling of intc_reg_fns[].

The three main advantages with this controller over the existing
ones are:

	- Both priority (ipr) and bitmap (intc2) registers are
	  supported
	- External pin sense configuration is supported, ie edge
	  vs level triggered
	- CPU/Board specific code maps 1:1 with datasheet for
	  easy verification

This controller can easily coexist with the current IPR and INTC2
controllers, but the idea is that CPUs/Boards should be moved over
to this controller over time so we have a single code base to
maintain.

Signed-off-by: Magnus Damm <damm@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>

...

This commit is contained in:

Magnus Damm 2007-07-18 17:25:09 +09:00 • committed by Paul Mundt

parent 53aba19f82

commit 02ab3f7079

4 changed files with 424 additions and 0 deletions

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3

arch/sh/Kconfig

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1

arch/sh/kernel/cpu/irq/Makefile

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352

arch/sh/kernel/cpu/irq/intc.c

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68

include/asm-sh/hw_irq.h

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