drm/msm: hdmi phy 8960 phy pll

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On downstream kernel the clk driver directly bangs hdmi phy registers.
For upstream kernel, we need to model this as a clock and register with
the clock framework.

Signed-off-by: Rob Clark <robdclark@gmail.com>

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Rob Clark 2014-06-25 09:54:36 -04:00

parent 89301471e6

commit 034fbcc3d8

1 changed files with 376 additions and 1 deletions

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drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c

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