habanalabs: Use single pool for CPU accessible host memory

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The device's CPU accessible memory on host is managed in a dedicated
pool, except for 2 regions - Primary Queue (PQ) and Event Queue (EQ) -
which are allocated from generic DMA pools.
Due to address length limitations of the CPU, the addresses of all these
memory regions must have the same MSBs starting at bit 40.
This patch modifies the allocation of the PQ and EQ to be also from the
dedicated pool, to ensure compliance with the limitation.

Signed-off-by: Tomer Tayar <ttayar@habana.ai>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>

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Tomer Tayar 2019-04-28 19:17:38 +03:00 • committed by Oded Gabbay

parent a38693d775

commit 03d5f641dc

4 changed files with 48 additions and 22 deletions

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12

drivers/misc/habanalabs/habanalabs.h

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40

drivers/misc/habanalabs/hw_queue.c

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8

drivers/misc/habanalabs/include/armcp_if.h

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10

drivers/misc/habanalabs/irq.c

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