drm/amdgpu:Add DPG mode read/write macro

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Some registers read/write needs program through SDRAM pool under
DPG mode.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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James Zhu 2018-09-10 16:00:36 -04:00 • committed by Alex Deucher

parent f28ff06210

commit 03d6e3aac8

1 changed files with 20 additions and 0 deletions

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drivers/gpu/drm/amd/amdgpu/soc15_common.h

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