clk: renesas: r9a07g044: Add USB clocks/resets

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Add clock/reset entries for USB PHY control, USB2.0 host and device.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210630073013.22415-5-biju.das.jz@bp.renesas.com
[geert: s/usb0_device/usb0_func]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

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Biju Das 2021-06-30 08:30:06 +01:00 • committed by Geert Uytterhoeven

parent eb829e549b

commit 03fa6e4b26

1 changed files with 12 additions and 0 deletions

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drivers/clk/renesas/r9a07g044-cpg.c

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