drm/amd/display: Incorrect Read Interval Time For CR Sequence

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[WHY]
TRAINING_AUX_RD_INTERVAL (DPCD 000Eh) modifies the read interval
for the EQ training sequence. CR read interval should remain 100 us.
Currently, the CR interval is also being modified.

[HOW]
lt_settings->cr_pattern_time should always be 100 us.

Signed-off-by: David Galiffi <david.galiffi@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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David Galiffi 2019-06-07 21:32:34 -04:00 • committed by Alex Deucher

parent 0b6cbbd5da

commit 0430017149

1 changed files with 1 additions and 1 deletions

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drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c

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