irqchip: Add Aspeed SCU interrupt controller

The Aspeed SOCs provide some interrupts through the System Control
Unit registers. Add an interrupt controller that provides these
interrupts to the system.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Link: https://lore.kernel.org/r/1579123790-6894-3-git-send-email-eajames@linux.ibm.com
This commit is contained in:
Eddie James 2020-01-15 15:29:40 -06:00 • committed by Marc Zyngier
commit 04f605906f
3 changed files with 241 additions and 1 deletions