drm/amd/amdgpu: Add SQ debug registers to GFX9/GFX10 headers (v2)

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Requested for UMR support.

(v2): Also add reg/bits for gfx9 headers

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

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Tom St Denis 2020-06-09 07:49:59 -04:00 • committed by Alex Deucher

parent 7504d3bbec

commit 055e23e3d9

10 changed files with 59 additions and 0 deletions

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1

drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_offset.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_1_0_sh_mask.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_offset.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_10_3_0_sh_mask.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_offset.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_offset.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_offset.h

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drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h

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