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drm/amd/display: Cast DP DTO pixel clock math to avoid overflow and narrowing
[Why] Commit0421fc6ab3("drm/amd/display: fix __udivdi3 link error") switched get_dp_dto_frequency_100hz() and dcn401_get_dp_dto_frequency_100hz() to div_u64() but dropped the original explicit casts, leaving two issues: - In get_dp_dto_frequency_100hz(), "clock_hz * dp_dto_ref_khz * 10" is computed in 32-bit unsigned arithmetic (both operands are unsigned int) before being stored into the u64 temp, so the product can overflow before it is widened (flagged by Coverity OVERFLOW_BEFORE_WIDEN). - div_u64() returns a u64 that is assigned directly to the unsigned int *pixel_clk_100hz, an implicit narrowing conversion that trips -Wconversion (possible loss of data) on stricter builds. [How] Cast clock_hz to unsigned long long so the multiplication is performed in 64-bit, and make the u64 -> unsigned int narrowing explicit with an (unsigned int) cast on the div_u64() results in both functions. The computed values are unchanged. Fixes:0421fc6ab3("drm/amd/display: fix __udivdi3 link error") Reviewed-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: James Lin <PingLei.Lin@amd.com> Signed-off-by: Chenyu Chen <chen-yu.chen@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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