ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)

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This patch adds Device Tree file for the CoreTile Express A15x2
(V2P-CA15) with Test Chip 1.

As the chip's GIC has 160 interrupt inputs and equivalent SMM
(FPGA) has GIC synthesised with 256 interrupts, NR_IRQS is
increased.

Signed-off-by: Pawel Moll <pawel.moll@arm.com>

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This commit is contained in:

Pawel Moll 2011-12-15 10:57:28 +00:00

parent cca070a916

commit 059289b260

3 changed files with 160 additions and 2 deletions

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157

arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts

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3

arch/arm/mach-vexpress/Makefile.boot

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2

arch/arm/mach-vexpress/include/mach/irqs.h

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