From 05cffc0749388d5979a75039f3715b17092c3f40 Mon Sep 17 00:00:00 2001 From: Mitul Golani Date: Tue, 3 Feb 2026 14:19:37 +0530 Subject: [PATCH] drm/i915/display: Implement Wa_16024710867 Defeature port sync feature for xe3lpd onwards. --v1: - Use xe3lpd naming (Suraj) - Use IS_DISPLAY_VER (Suraj) --v2: - Comments update and Adding Bspec link (Suraj) Bspec: 69965 Signed-off-by: Mitul Golani Reviewed-by: Suraj Kandpal Signed-off-by: Suraj Kandpal Link: https://patch.msgid.link/20260203084937.1447834-2-mitulkumar.ajitkumar.golani@intel.com --- drivers/gpu/drm/i915/display/intel_ddi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index d8739e2bb004..f92323664162 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -4588,8 +4588,10 @@ intel_ddi_port_sync_transcoders(const struct intel_crtc_state *ref_crtc_state, /* * We don't enable port sync on BDW due to missing w/as and * due to not having adjusted the modeset sequence appropriately. + * From, xe3lpd onwards we have defeatured this with reference to + * Wa_16024710867 */ - if (DISPLAY_VER(display) < 9) + if (!IS_DISPLAY_VER(display, 9, 20)) return 0; if (!intel_crtc_has_type(ref_crtc_state, INTEL_OUTPUT_DP))