From 061ce2b5f92214d8d867ae4ec3b24e211ff20664 Mon Sep 17 00:00:00 2001 From: Xiang Liu Date: Thu, 10 Sep 2026 22:35:03 +0800 Subject: [PATCH] drm/amd/ras: apply the MCA debug mode on every RAS resume amdgpu_ras_late_init() sends the MCA configuration to PMFW, but it runs before RAS is ready on a device that still needs a hive reset, so the request is dropped and CE polling stays disabled. A reset loses the setting too, since PMFW is reloaded and nothing programs it again. The request is a single SMU message and does not depend on the RAS block being up, so amdgpu_ras_mgr_set_debug_mode() no longer requires it. Send it from amdgpu_ras_resume(), which covers modprobe, resume from suspend, GPU reset and reset on init, and drop it from amdgpu_ras_late_init(). Signed-off-by: Xiang Liu Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 5 ++--- drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c | 5 +++-- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c index 3f3aa44921ab..6b2b8acdbf9b 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c @@ -3894,6 +3894,8 @@ void amdgpu_ras_resume(struct amdgpu_device *adev) return; } + amdgpu_ras_mgr_set_debug_mode(adev, false); + if (con->flags & AMDGPU_RAS_FLAG_INIT_BY_VBIOS) { /* Set up all other IPs which are not implemented. There is a * tricky thing that IP's actual ras error type should be @@ -3954,9 +3956,6 @@ int amdgpu_ras_late_init(struct amdgpu_device *adev) if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_ras_telemetry_en(adev)) return 0; - if (amdgpu_uniras_enabled(adev)) - amdgpu_ras_mgr_set_debug_mode(adev, false); - list_for_each_entry_safe(node, tmp, &adev->ras_list, node) { obj = node->ras_obj; if (!obj) { diff --git a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c index a02167397ce2..982ca34dba8f 100644 --- a/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c +++ b/drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c @@ -830,8 +830,9 @@ int amdgpu_ras_mgr_set_debug_mode(struct amdgpu_device *adev, bool enable) struct amdgpu_ras_mgr *ras_mgr = amdgpu_ras_mgr_get_context(adev); int ret; - if (!ras_mgr || !ras_mgr->ras_core || !ras_mgr->ras_is_ready) - return false; + /* this only talks to PMFW, so it does not wait for the RAS block */ + if (!ras_mgr || !ras_mgr->ras_core) + return -EINVAL; ret = ras_core_set_debug_mode(ras_mgr->ras_core, enable); if (!ret)