drm/msm/dpu: enable compression bit in cfg2 for DSC

Browse source

Enable compression bit in cfg2 register for DSC in the DSI case
per hardware version.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-QRD
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/596231/
Link: https://lore.kernel.org/r/20240530-msm-drm-dsc-dsi-video-upstream-4-v6-3-2ab1d334c657@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>

...

This commit is contained in:

Jun Nie 2024-05-30 13:56:47 +08:00 • committed by Dmitry Baryshkov

parent 17236bc0ee

commit 063557239c

3 changed files with 11 additions and 3 deletions

Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL

Download patch file Download diff file Expand all files Collapse all files

3

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c

View file

8

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c

View file

3

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h

View file