phy: qcom-qmp: Add v10 register offsets

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Hawi SoC uses v10 register definitions for PCIe Gen3 x2. Add the new
register offset headers for all four sub-blocks:

 - QSERDES-COM offsets
 - QSERDES TX/RX offsets
 - PCS offsets
 - PCS PCIe-specific offsets

Signed-off-by: Matthew Leung <matthew.leung@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://patch.msgid.link/20260707-hawi-phy-pcie-v4-2-8d9cc6324947@oss.qualcomm.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

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Matthew Leung 2026-07-07 20:32:47 +00:00 • committed by Vinod Koul

parent d15224492d

commit 0696cc735d

6 changed files with 142 additions and 0 deletions

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1

drivers/phy/qualcomm/phy-qcom-qmp-pcie.c

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18

drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v10.h

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22

drivers/phy/qualcomm/phy-qcom-qmp-pcs-v10.h

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49

drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v10.h

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47

drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v10.h

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5

drivers/phy/qualcomm/phy-qcom-qmp.h

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