clk: samsung: exynos5433: Add clocks for CMU_MIF domain

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This patch adds the mux/divider/gate clocks of CMU_MIF domain which includes
the clocks for DMC(DRAM memory controller) and CCI(Cache Coherent Interconnect).
The CMU_MIF domain provides the source clocks for CMU_DISP/CMU_BUS2.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

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Chanwoo Choi 2015-02-02 23:24:01 +09:00 • committed by Sylwester Nawrocki

parent a29308dad5

commit 06d2f9dfa6

2 changed files with 788 additions and 1 deletions

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599

drivers/clk/samsung/clk-exynos5433.c

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190

include/dt-bindings/clock/exynos5433.h

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