arm64: dts: qcom: x1e80100: Add cpucp mailbox and sram nodes

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Add the cpucp mailbox and sram nodes required by SCMI perf protocol
on X1E80100 SoCs.

Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Link: https://lore.kernel.org/r/20241030130840.2890904-2-quic_sibis@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

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Sibi Sankar 2024-10-30 18:38:39 +05:30 • committed by Bjorn Andersson

parent 9c6ee9a760

commit 06e3c7ec80

1 changed files with 26 additions and 0 deletions

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arch/arm64/boot/dts/qcom/x1e80100.dtsi

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