MIPS: Loongson: Invalidate special TLBs when needed

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Loongson-2 has a 4 entry itlb which is a subset of jtlb, Loongson-3 has
a 4 entry itlb and a 4 entry dtlb which are subsets of jtlb. We should
write diag register to invalidate itlb/dtlb when flushing jtlb because
itlb/dtlb are not totally transparent to software.

For Loongson-3A R2 (and newer), we should invalidate ITLB, DTLB, VTLB
and FTLB before we enable/disable FTLB.

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Steven J . Hill <sjhill@realitydiluted.com>
Cc: Fuxin Zhang <zhangfx@lemote.com>
Cc: Zhangjin Wu <wuzhangjin@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/12753/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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Huacai Chen 2016-03-03 09:45:11 +08:00 • committed by Ralf Baechle

parent 37fbe8faa9

commit 06e4814eec

3 changed files with 27 additions and 12 deletions

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9

arch/mips/include/asm/mipsregs.h

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3

arch/mips/kernel/cpu-probe.c

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27

arch/mips/mm/tlb-r4k.c

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