drm/msm: Periodically update RPTR shadow

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On a5xx and a6xx devices that are using CP_WHERE_AM_I to update a
ringbuffer read-ptr shadow value, periodically emit a CP_WHERE_AM_I
every 32 commands, so that a later submit waiting for ringbuffer
space to become available sees partial progress, rather than not
seeing rptr advance at all until the GPU gets to the end of the
submit that it is currently chewing on.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Acked-by: Jordan Crouse <jordan@cosmicpenguin.net>
Link: https://lore.kernel.org/r/20210428193654.1498482-3-robdclark@gmail.com
Signed-off-by: Rob Clark <robdclark@chromium.org>

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This commit is contained in:

Rob Clark 2021-04-28 12:36:49 -07:00

parent 510410bfc0

commit 0710a740dc

2 changed files with 45 additions and 11 deletions

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29

drivers/gpu/drm/msm/adreno/a5xx_gpu.c

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27

drivers/gpu/drm/msm/adreno/a6xx_gpu.c

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