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staging: media: tegra-video: tegra20: increase maximum VI clock frequency
Increase maximum VI clock frequency to 450MHz to allow correct work with high resolution camera sensors. Tested-by: Luca Ceresoli <luca.ceresoli@bootlin.com> # tegra20, parallel camera Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
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