drm/i915: Move the SPLL enabling into hsw_crt_pre_enable

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The call to intel_ddi_pll_enable in haswell_crtc_mode_set is the only
function that still touches the hardware state from the crtc mode_set
callback on hsw. Since the SPLL isn't ever shared we can easily take
it out into the hsw crt encoder functions.

Temporarily we'll loose a bit of WARN_ON coverage with this, but once
the WRPLLs are switched over that will be restored. For the SPLL
selection add a WARN in the hsw fdi link training code.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
[imre: rebased on patchset version w/o pch/crt/fdi refactoring]
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

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This commit is contained in:

Daniel Vetter 2014-06-25 22:01:51 +03:00

parent 97b040aa39

commit 082717ead9

2 changed files with 14 additions and 18 deletions

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13

drivers/gpu/drm/i915/intel_crt.c

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19

drivers/gpu/drm/i915/intel_ddi.c

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