riscv: dts: add resets property for uart node

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Add resets property for uart0 for completeness, although it is
deasserted by default.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/807f75e433a0f900da40ebb6a448349c98580072.1706577450.git.unicorn_wang@outlook.com
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>

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Chen Wang 2024-01-30 09:50:51 +08:00 • committed by Inochi Amaoto

parent 1ce7587e50

commit 08573ba006

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arch/riscv/boot/dts/sophgo/sg2042.dtsi

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