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- Adds VPU and Video Decoder clocks IDs on Meson8b
- Finally remove the wrong ABP Meson8b clock id - Adds Video Decoder, PCIe PLL & CPU Clock IDs on G12A - Re-expose SAR_ADC_SEL and CTS_OSCIN on G12A AO clock controller - Unexpose some AXG-Audio input clocks IDs -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcofZ/AAoJEHfc29rIyEnRLQAP/RgplVJFwBnNL/2RqUAgpWff R2l8Bor+wLJE/np7bdAntVRA5bUbCZEpvzYJEZ3p5xD/KFvrkaWe2SshMXonexTp YYl1+6+eAWSSRQBzTnXfovxyqgx9gOIszHdc6m5EK1f6w7DLpXaR85+f7lZEVPHq CUwPconTar5dLLhEZ3oQQeAugp0buMhdIwx/XGksUe5gScB53GMkGY58L4loahOg YhQ8pJK8TLpBhRHaJh4XA5nXjPu03urKrSLp09FyR8YZo4aK+zv82N96/ueQxREV O/C2GaYQee7j4ROZEW4EarPpEWmZvlOQjPRNxcgcaly3GkwauqnZsWHxtM0Ew3Me CJUhz2mkU5yz9dPoTq69i1GLqLgCx+x+NQGjRVoqcxBP0+6yWKd87xnXg5XPTQWL kYjmWTuNWD9GRI/w0wd0Pr9755Vd6ZxiLn3acSf17J1Jghy1NFm1Kirp6198mSMs cEaKDy+xeztunh6195KdYLyqKgAGDm5urZyGEa2HojRb1db5N0ah0LlLCHg4DFfT nI2xSfvdYIY4PoY1fjDRZD7zxSlgst9GBnBo+ushjqt3kq7U+rn3PwYMlfgEPHL7 rJwMNLV+eov66xLnNP0nyFdhMDYZqV6HeDH5dMNrwwxO8tN4Bsn3ucVRgXo9SJhT 2VU08scSLQ6iTLNNekLz =/wZ5 -----END PGP SIGNATURE----- Merge tag 'meson-clk-headers-5.2' of git://github.com/BayLibre/clk-meson into v5.2/dt64 - Adds VPU and Video Decoder clocks IDs on Meson8b - Finally remove the wrong ABP Meson8b clock id - Adds Video Decoder, PCIe PLL & CPU Clock IDs on G12A - Re-expose SAR_ADC_SEL and CTS_OSCIN on G12A AO clock controller - Unexpose some AXG-Audio input clocks IDs * tag 'meson-clk-headers-5.2' of git://github.com/BayLibre/clk-meson: dt-bindings: clock: meson8b: export the video decoder clocks dt-bindings: clock: meson8b: export the VPU clock dt-bindings: clock: g12a-aoclk: expose CLKID_AO_CTS_OSCIN dt-bindings: clock: meson8b: drop the "ABP" clock definition dt-bindings: clk: g12a-clkc: add VDEC clock IDs dt-bindings: clock: axg-audio: unexpose controller inputs dt-bindings: clk: g12a-clkc: add PCIE PLL clock ID clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id clk: meson-g12a: add cpu clock bindings
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